Patents
Patents for G06F 5 - Methods or arrangements for data conversion without changing the order or content of the data handled (8,116)
07/1993
07/27/1993US5231600 Overflow detector for anticipating producing invalid operands resulting from performing shift operations on such operands
07/22/1993WO1993014456A1 Barrel shifter
07/21/1993EP0551789A1 Apparatus for recovering lost buffers in a data processing system
07/20/1993CA1320587C Method and apparatus for implementing adaptive forward differencing using integer arithmetic
07/20/1993CA1320576C Semiconductor memory circuit
07/15/1993DE4200667A1 Read-write buffer with integrated test circuitry - compares register contents of two feedback shift registers after writing of data to specific address, and after reading of buffer
07/14/1993EP0551191A1 Apparatus and method for transferring data to and from host system
07/13/1993US5228002 First-in first-out memory device and method for accessing the device
07/13/1993US5227789 Modified huffman encode/decode system with simplified decoding for imaging systems
07/07/1993EP0550163A1 Circuit architecture for supporting multiple-channel DMA operations
07/06/1993US5226012 Buffer memory circuit having constant propagation delay
06/1993
06/30/1993EP0549052A2 An apparatus featuring a feedback signal for controlling a powering voltage for asynchronous electronic circuitry therein
06/29/1993US5224213 Ping-pong data buffer for transferring data from one data bus to another data bus
06/29/1993US5224093 For use in a data packet switch
06/24/1993WO1993012600A1 Digital clock dejitter circuits for regenerating clock signals with minimal jitter
06/24/1993WO1993012481A2 Buffer and frame indexing
06/24/1993CA2125788A1 Buffer and frame indexing
06/23/1993EP0547459A1 Partial word to full word parallel data shifter
06/23/1993EP0540665A4 Routing independent circuit components
06/22/1993CA1319437C Intermediate spreadsheet structure
06/16/1993EP0546863A2 Data compression apparatus
06/16/1993EP0546507A2 FIFO memory control device
06/15/1993US5220586 Circuitry and method for variable single transition counting
06/15/1993US5220529 One-chip first-in first-out memory device having matched write and read operations
06/09/1993EP0545575A1 Multiple virtual FIFO arrangement
06/08/1993US5218692 Digital pulse timing parameter measuring device
05/1993
05/30/1993CA2079503A1 Multiple virtual fifo arrangement
05/25/1993US5214783 Device for controlling the enqueuing and dequeuing operations of messages in a memory
05/25/1993US5214642 ATM switching system and adaptation processing apparatus
05/25/1993US5214607 Look-ahead FIFO byte count apparatus
05/25/1993US5214598 Unbiased bit disposal apparatus and method
05/18/1993US5212780 System for single cycle transfer of unmodified data to a next sequentially higher address in a semiconductor memory
05/18/1993CA1318035C Adaptive data compression method and apparatus
05/12/1993EP0540665A1 Routing independent circuit components
05/11/1993US5210829 Adjustable threshold for buffer management
05/11/1993US5210713 Data storage method and first-in first-out memory device
05/11/1993US5210536 Data compression/coding method and device for implementing said method
05/05/1993EP0540285A2 Method and apparatus for floating point normalisation
05/04/1993US5208913 Buffer memory for synchronizing data transmission and reception between two devices having mutually different operating speeds and operating methods therefor
04/1993
04/28/1993EP0538745A2 Method for buffering high bandwidth data from an input device
04/27/1993US5206817 Pipelined circuitry for allowing the comparison of the relative difference between two asynchronous pointers and a programmable value
04/21/1993EP0537397A1 Adaptive FIFO memory controller
04/16/1993CA2071347A1 Expandable high performance fifo design
04/07/1993EP0535571A2 Modified Huffman encode/decode system with simplified decoding for imaging systems
04/06/1993US5200916 Mantissa processing circuit of floating point arithmetic apparatus for addition and subtraction
03/1993
03/31/1993EP0534883A1 Method and apparatus for synchronizing the readout of a sequential media device with a separate clocked device
03/31/1993EP0534713A2 Dictionary reset performance enhancement for data compression applications
03/30/1993CA1315394C Time-division bit number conversion circuit
03/24/1993EP0533343A2 System and method for data management
03/24/1993EP0533337A1 Apparatus and method for resolving dependencies among a plurality of instructions within a storage device
03/23/1993US5197128 Modular interface
03/10/1993EP0530791A2 Data transmission method
03/10/1993EP0530363A1 Device for transmitting a synchronous data
03/09/1993US5193170 Methods and apparatus for maintaining cache integrity whenever a cpu write to rom operation is performed with rom mapped to ram
03/09/1993US5193164 Data deskewing apparatus utilizing bank switched random access memories
03/09/1993US5193153 System for detecting overwriting of data in a buffer memory, particularly for a data switch
03/09/1993US5192950 Partial word to full word parallel data shifter
03/03/1993EP0185924B1 Buffer system with detection of read or write circuits' failures
02/1993
02/16/1993US5187800 Asynchronous pipelined data processing system
02/16/1993US5187678 Priority encoder and floating-point normalization system for IEEE 754 standard
02/09/1993US5185863 Byte-wide elasticity buffer
02/03/1993EP0525874A2 Asynchronous access FIFO memory buffer with padding flag
02/02/1993US5184126 Method of decompressing compressed data
01/1993
01/28/1993DE4124761A1 Card-type control device for data-processing or transmission - feeds received data to buffer memory, supplies in parallel form to processor for real=time processing
01/27/1993EP0524322A1 Circuit for data transfer between data processing systems
01/22/1993EP0579595A4 Clock dejitter circuits for regenerating jittered clock signals.
01/14/1993DE4123007A1 Data rate matching method using packing data - storing input words in registers of buffer memory, controlling multiplexer w.r.t. number of bits in output word and varying bits in synchronising word
01/13/1993EP0522697A1 Video memory interface to control processor access to video memory
01/13/1993EP0522224A1 High speed buffer management
01/12/1993US5179688 Queue system with uninterrupted transfer of data through intermediate locations to selected queue location
01/12/1993US5179662 Optimized i/o buffers having the ability to increase or decrease in size to meet system requirements
01/12/1993US5179647 Method and apparatus for implementing adaptive forward differencing using integer arithmetic
01/07/1993EP0521677A1 Parallel to serial data transfer system
01/07/1993DE4121863A1 Monitoring of buffer memory cycle to avoid overflow or clearing - counting input and output clock pulses with values summed to generate address spacing signals for indication of alarm state
12/1992
12/30/1992CN1019697B Arithmetic operater
12/29/1992US5175832 Modular memory employing varying number of imput shift register stages
12/29/1992US5175819 Cascadable parallel to serial converter using tap shift registers and data shift registers while receiving input data from FIFO buffer
12/29/1992US5175810 Tabular data format
12/29/1992US5175543 Dictionary reset performance enhancement for data compression applications
12/22/1992US5173853 Data format conversion
12/22/1992CA1311848C Apparatus and method for floating point normalization prediction
12/16/1992EP0517808A1 A method and apparatus for transferring data through a staging memory
12/10/1992WO1992022141A1 Data compression using multiple levels
12/10/1992CA2103445A1 Data compression usin multipel levels
12/08/1992CA1311313C Peripheral repeater box
12/02/1992EP0516232A1 Apparatus allowing the transmission of data with a variable bit rate between a modem and a synchronous terminal
12/02/1992EP0516171A2 Bit data shift amount detector
12/01/1992US5168523 Method of rotating a word constituted by binary elements and arrangement in which the said method is carried out
12/01/1992CA2069856A1 Arrangement permitting variable-rate data transfer between a modem and a synchronous terminal
11/1992
11/25/1992EP0515238A1 Management device for multiple independent queues in a common general purpose memory space
11/24/1992US5166898 Shift amount floating-point calculating circuit with a small amount of hardware and rapidly operable
11/24/1992CA2067889A1 Device for managing several independent queues in a common memory space
11/17/1992CA1310430C Hot standby memory copy system
11/12/1992WO1992020028A1 Method and apparatus for buffering data within stations of a communication network
11/11/1992EP0511971A1 Unbiased bit disposal apparatus and method
11/03/1992US5161221 Multi-memory bank system for receiving continuous serial data stream and monitoring same to control bank switching without interrupting continuous data flow rate
11/03/1992US5161220 Data write control circuit having word length conversion function
11/03/1992US5161117 Floating point conversion device and method
10/1992
10/30/1992WO1992020176A1 Vocabulary memory allocation for adaptive data compression of frame-multiplexed traffic
10/28/1992EP0510116A1 Method and apparatus for providing maximum rate modulation or compression encoding and decoding
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