Patents
Patents for G06F 5 - Methods or arrangements for data conversion without changing the order or content of the data handled (8,116)
11/1994
11/08/1994US5363099 Method and apparatus for entropy coding
11/08/1994US5363098 Byte aligned data compression
11/01/1994US5361060 Data transmission apparatus and method of operating the same
10/1994
10/26/1994EP0621533A1 Barrel shifter
10/25/1994US5359568 FIFO memory system
10/18/1994US5357622 Apparatus for queing and storing data writes into valid word patterns
10/18/1994US5357250 Adaptive computation of symbol probabilities in n-ary strings
10/18/1994US5357236 Parallelized difference flag logic
10/11/1994US5355450 Media composer with adjustable source material compression
10/11/1994US5355396 Circuitry and method for modularized single transition counting
10/11/1994US5355113 Serialized difference flag circuit
10/04/1994US5353248 EEPROM-backed FIFO memory
09/1994
09/28/1994EP0616744A1 Digital clock dejitter circuits for regenerating clock signals with minimal jitter
09/20/1994US5349683 Bidirectional FIFO with parity generator/checker
09/14/1994EP0615345A2 Method and system for data compression
09/14/1994EP0615199A1 Video compression/decompression using discrete cosine transformation
09/13/1994CA2118870A1 Method and system for data compression
09/12/1994CA2091539A1 Video compression/decompression processing and processors
09/06/1994US5345569 Apparatus and method for resolving dependencies among a plurality of instructions within a storage device
09/06/1994US5345419 Fifo with word line match circuits for flag generation
09/01/1994WO1994019743A1 Intermediate processor disposed between a host processor channel and a storage director with error management
08/1994
08/30/1994US5343553 Digital fuzzy inference system using logic circuits
08/30/1994US5343435 Use of a data register to effectively increase the efficiency of an on-chip write buffer
08/30/1994US5343413 Leading one anticipator and floating point addition/subtraction apparatus
08/30/1994CA1331810C Method and system for binary-to-decimal interconversion
08/23/1994US5341492 Frame conversion circuit including initial value input circuit
08/16/1994US5339338 Apparatus and method for data desynchronization
08/16/1994US5339079 Digital-to-analog converter with a flexible data interface
08/16/1994US5339076 Data compression using content addressable memory
08/09/1994US5337409 Parallel/serial data conversion system
08/09/1994US5336938 Apparatus for generating an asynchronous status flag with defined minimum pulse
08/04/1994WO1994017476A1 Interface apparatus
08/04/1994WO1994017470A1 System for dynamically allocating memory registers for forming pseudo queues
08/03/1994EP0608492A2 Method and apparatus for delta row decompression
07/1994
07/27/1994EP0559649A4 Method and means for transferring a data payload from a first sonet signal to a sonet signal of different frequency
07/20/1994EP0606811A2 Employing a preferred object handler
07/20/1994EP0606600A1 Improved single and multistage stage FIFO designs for data transfer synchronizers
07/20/1994CN1025518C Apparatus and method for asynchronously delivering control elements with pipe interface
07/19/1994US5331641 Methods and apparatus for retiming and realignment of STS-1 signals into STS-3 type signal
07/19/1994US5331598 Memory control device
07/19/1994CA1330838C Method and apparatus for encoding, decoding and transmitting data in compressed form
07/12/1994US5329405 Associative cam apparatus and method for variable length string matching
07/07/1994WO1994015269A2 Apparatus, system and method for facilitating communication between components having different byte orderings
07/06/1994EP0605222A1 Disc data reproducing apparatus and signal processing circuit
07/05/1994US5327419 Communication system having a multiprocessor system serving the purpose of central control
07/05/1994US5327391 Double buffer type elastic store comprising a pair of data memory blocks
07/05/1994CA1330600C Fifo memory system
06/1994
06/29/1994EP0401340B1 Method and apparatus for handling high speed data
06/28/1994US5325492 System for asynchronously delivering self-describing control elements with a pipe interface having distributed, shared memory
06/28/1994US5325487 Shadow pipeline architecture in FIFO buffer
06/28/1994US5325091 Text-compression technique using frequency-ordered array of word-number mappers
06/22/1994EP0602337A1 High-speed barrel shifter
06/21/1994US5323426 Elasticity buffer for data/clock synchronization
06/21/1994US5323272 Time delay control for serial digital video interface audio receiver buffer
06/21/1994US5323155 Semi-static data compression/expansion method
06/14/1994US5321399 Parallel/serial conversion circuit, serial/parallel conversion circuit and system including such circuits
06/09/1994WO1994012983A1 Look ahead flag for fifo
06/07/1994US5319597 FIFO memory and line buffer
06/01/1994EP0599418A2 Encoding and decoding data
05/1994
05/26/1994WO1994011811A1 Multi-lingual computer programs
05/26/1994WO1994011800A2 Data storage system with stale data detection and error detection and correction system
05/24/1994US5315708 Method and apparatus for transferring data through a staging memory
05/18/1994CN1024599C Method and apparatus for maintaining cache integrity
05/17/1994US5313600 System for controlling the number of data pieces in a queue memory
05/17/1994US5313582 Data communication controller
05/10/1994US5311475 High speed full and empty flag generators for first-in first-out memory
05/04/1994EP0595064A2 Method and means providing static dictionary structures for compressing character data and expanding compressed data
05/03/1994US5309566 System and method for character translation
05/03/1994US5309382 Binary shifter
05/03/1994US5309358 Method for interchange code conversion of multi-byte character string characters
04/1994
04/28/1994WO1994009434A1 Demand allocation of read/write buffer partitions favoring sequential read cache
04/27/1994EP0594304A2 Opcode specific compression for window system
04/27/1994EP0594241A1 Arrangement for storing an information signal in a memory and retrieving the information signal from said memory
04/27/1994EP0593968A1 Cache-based data compression/decompression
04/26/1994US5307476 Floppy disk controller with DMA verify operations
04/20/1994EP0593073A1 A processor incorporating shifters
04/19/1994US5305319 FIFO for coupling asynchronous channels
04/19/1994US5305253 Zero fall-through time asynchronous fifo buffer with nonambiguous empty-full resolution
04/12/1994US5303261 High-throughput pipelined communication channel for interruptible data transmission
04/12/1994US5303236 Communication system
04/06/1994CN1024114C Microcomputerized controller of respirator
04/05/1994US5301351 Data transfer control system between high speed main memory and input/output processor with a data mover
04/05/1994US5301345 Data processing system for performing a shifting operation and a constant generation operation and method therefor
04/05/1994US5301141 Data flow computer with an articulated first-in-first-out content addressable memory
04/05/1994US5301139 Shifter circuit for multiple precision division
03/1994
03/31/1994WO1994007199A1 Dma data path aligner and network adaptor utilizing same
03/30/1994EP0588921A1 Data compression using multiple levels
03/29/1994US5299304 Method and apparatus for identifying multiple stage document format transformations
03/29/1994US5299156 Dual port static RAM with bidirectional shift capability
03/29/1994US5298895 Data compression method and apparatus utilizing an adaptive dictionary
03/22/1994US5297180 Digital clock dejitter circuits for regenerating clock signals with minimal jitter
03/22/1994US5297070 Transform processing circuit
03/22/1994CA2050799C Shift amount floating-point calculating circuit with a small amount of hardware and rapidly operable
03/22/1994CA2003926C Method of processing data
03/15/1994US5295252 Data storage device
03/15/1994US5295250 Microprocessor having barrel shifter and direct path for directly rewriting output data of barrel shifter to its input
03/15/1994US5295246 Bidirectional FIFO buffer for interfacing between two buses of a multitasking system
03/10/1994DE4321473A1 FIFO with data expansion-compression in binary steps - uses shifted counter outputs to control address generators for read=write
03/08/1994US5293623 Random access memory based buffer memory and associated method utilizing pipelined look-ahead reading
03/08/1994US5293490 Data buffering device having simple data reading and/or storing function
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