Patents
Patents for G01R 31 - Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere (152,264)
09/2006
09/20/2006CN1834680A Integrated circuit with a control input that can be disabled
09/20/2006CN1834679A Method and apparatus for a twisting fixture probe for probing test access point structures
09/20/2006CN1834678A Multi-channel analyzer of non-contact applied chip
09/20/2006CN1834677A Main circuit of general smart synthetic all-duty testing device
09/20/2006CN1834676A Auxilary valve triggering and detecting code of all-duty testing device
09/20/2006CN1834675A Inspection method and device of using scan laser SQUID microscope
09/20/2006CN1834674A Method and apparatus for a reliability testing
09/20/2006CN1834673A Insulating state on-line monitoring method of cross-linked PE cable
09/20/2006CN1834672A Highly reliable vehicle system start controller
09/20/2006CN1834671A Double injection synthetic test method of high voltage series TCR
09/20/2006CN1834670A Overcurrent tester of TCR
09/20/2006CN1834669A On-line detecting and positioning device for local discharging of electrical insulated combined electrical appliance, and positioning method thereof
09/20/2006CN1834668A System class testing method
09/20/2006CN1834664A Test system and connection box therefor
09/20/2006CN1834663A Printed circuit holding device
09/20/2006CN1834630A Base inspection device,method and device for setting inspection logic
09/20/2006CN1834600A Testing clamp and method of producing super-short optical palse based on cascade electrical sucking modulator
09/20/2006CN1276509C Semiconductor integrated circuit
09/20/2006CN1276493C Device and method for nondestructive inspection of semiconductor device
09/20/2006CN1276264C Method for determining stable cell terminal voltage
09/20/2006CN1276260C Coaxial probe interface for automatic test equipment
09/19/2006US7111257 Using a partial metal level mask for early test results
09/19/2006US7111224 FPGA configuration memory with built-in error correction mechanism
09/19/2006US7111218 Apparatus with self-test circuit
09/19/2006US7111217 Method and system for flexibly nesting JTAG TAP controllers for FPGA-based system-on-chip (SoC)
09/19/2006US7111216 Scan controller and integrated circuit including such a controller
09/19/2006US7111215 Methods of reducing the susceptibility of PLD designs to single event upsets
09/19/2006US7111214 Circuits and methods for testing programmable logic devices using lookup tables and carry chains
09/19/2006US7111213 Failure isolation and repair techniques for integrated circuits
09/19/2006US7111212 Debugging system for semiconductor integrated circuit
09/19/2006US7111211 Efficient air-flow loop through dual burn-in chambers with removable pattern-generator boards for memory-module environmental testing
09/19/2006US7111210 Accelerated test method for ferroelectric memory device
09/19/2006US7111209 Test pattern compression for an integrated circuit test environment
09/19/2006US7111208 On-chip standalone self-test system and method
09/19/2006US7111199 Built-in debug feature for complex VLSI chip
09/19/2006US7111087 Storage control system and operating method for storage control system
09/19/2006US7111073 Apparatus for estimating delay and jitter between network routers
09/19/2006US7111049 System and method for providing internet based phone conferences using multiple codecs
09/19/2006US7110905 Universal automated circuit board tester
09/19/2006US7110896 System and method for displaying battery status and other parameters of a portable electronic device in a power-off state
09/19/2006US7110895 Leakage current or resistance measurement method, and monitoring apparatus and monitoring system of the same
09/19/2006US7110864 Systems, devices, and methods for detecting arcs
09/19/2006US7110354 Method of controlling 1+1bi-directional switching operation of asynchronous transfer mode switch
09/19/2006US7110307 Semiconductor memory with a data holding circuit having two output terminals
09/19/2006US7109779 Semiconductor integrated circuit and a burn-in method thereof
09/19/2006US7109742 Current sensing in a two-phase motor
09/19/2006US7109741 Image data display on an information carrier
09/19/2006US7109740 Method for retesting semiconductor device
09/19/2006US7109739 Wafer-level opto-electronic testing apparatus and method
09/19/2006US7109738 Method for modeling inductive effects on circuit performance
09/19/2006US7109737 Arrangements having IC voltage and thermal resistance designated on a per IC basis
09/19/2006US7109736 System for measuring signal path resistance for an integrated circuit tester interconnect structure
09/19/2006US7109735 Method for measuring gate dielectric properties for three dimensional transistors
09/19/2006US7109734 Characterizing circuit performance by separating device and interconnect impact on signal delay
09/19/2006US7109733 Test head docking system and method
09/19/2006US7109732 Electronic component test apparatus
09/19/2006US7109731 Membrane probing system with local contact scrub
09/19/2006US7109730 Non-contact tester for electronic circuits
09/19/2006US7109721 Method and electronic circuit for regenerating an electrical contact
09/19/2006US7109720 Method for determining wear of a switchgear contacts
09/19/2006US7109700 Multimeter having off-device display device and selection device
09/19/2006US7109685 Method for estimating states and parameters of an electrochemical cell
09/19/2006US7109684 Secondary cell charger and charging method
09/19/2006US7109582 Semiconductor device for testing semiconductors
09/19/2006US7109050 Solid state image pickup device and method of fabricating the same
09/19/2006US7109047 Method and device for analyzing circuits
09/19/2006US7108546 High density planar electrical interface
09/19/2006US7107817 Method for calibrating semiconductor test instruments
09/19/2006US7107816 Method for calibrating semiconductor test instruments
09/19/2006US7107815 Method for calibrating semiconductor test instruments
09/19/2006CA2354248C Method and apparatus for tracing hardware states using dynamically reconfigurable test circuits
09/15/2006CA2536444A1 Dynamic vehicle electrical system test
09/14/2006WO2006096644A2 Circuit board diagnostic operating center
09/14/2006WO2006096543A2 Temperature sensing and prediction in ic sockets
09/14/2006WO2006096361A2 Apparatus and method for controlling temperature in a chuck system
09/14/2006WO2006096327A2 Boundary scan testing system
09/14/2006WO2006095791A1 Element substrate, inspecting method, and manufacturing method of semiconductor device
09/14/2006WO2006095715A1 Test device, test method, electronic device manufacturing method, test simulator, and test simulation method
09/14/2006WO2006095563A1 Method of displaying remaining battery power, and electronic apparatus
09/14/2006WO2006094908A1 Measuring device and method for monitoring a network
09/14/2006WO2006094522A1 Test method and production method for a semiconductor circuit composed of partial circuits
09/14/2006WO2006055862A3 Programmable memory built-in-self-test (mbist) method and apparatus
09/14/2006WO2005101113A3 Polymer dispersed liquid crystal formulations for modulator fabrication
09/14/2006WO2005076132A3 A test system
09/14/2006WO2004042795A3 Method of preparing whole semiconductor wafer for analysis
09/14/2006US20060206773 Tester simulation system and tester simulation method using same
09/14/2006US20060206772 Method and apparatus for supporting test pattern generation, and computer product
09/14/2006US20060206771 Read-only memory and operational control method thereof
09/14/2006US20060206762 Circuit arrangement, in addition to method for identifying interruptions and short-circuits in coupled systems
09/14/2006US20060206280 Jtag testing arrangement
09/14/2006US20060206277 Wireless functional testing of RFID tag
09/14/2006US20060206276 Method of estimating maximum output of battery for hybrid electric vehicle
09/14/2006US20060206241 Control unit for vehicle and control system
09/14/2006US20060203735 Bridge apparatus and control packet processing apparatus in a spanning tree protocol network
09/14/2006US20060203734 Method and system of evaluating survivability of ATM switches over SONET networks
09/14/2006US20060203729 Dynamic adaptation of MAC-layer retransmission value
09/14/2006US20060203722 System and method for managing performance of mobile terminals via remote diagnostics
09/14/2006US20060202857 Status detector for power supply, power supply, and initial characteristic extracting device for use with power supply
09/14/2006US20060202733 High performance signal generation
09/14/2006US20060202709 Apparatus and methods for self-heating burn-in processes