Patents
Sitemap › H03 - Basic electronic circuitry › H03K - Pulse technique › H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996)
08/2000
08/29/2000US6111450 Operating voltage adapting buffer
08/29/2000US6111439 High-speed switching regulator drive circuit
08/29/2000US6111435 Low power multiplexer with shared, clocked transistor
08/29/2000US6111434 Circuit having anti-charge share characteristics and method therefore
08/29/2000US6111431 LVDS driver for backplane applications
08/29/2000US6111430 Circuit for interfacing a first type of logic circuit with a second type of logic circuit
08/29/2000US6111428 Programmable logic array
08/29/2000US6111427 Logic circuit having different threshold voltage transistors and its fabrication method
08/29/2000US6111426 Logic signal output buffer circuit
08/29/2000US6111425 Very low power logic circuit family with enhanced noise immunity
08/24/2000WO2000049718A1 Global signal distribution architecture in a field programmable gate array
08/23/2000EP1030450A1 Tristate differential output stage
08/23/2000EP1030380A2 Single-flux-quantum digital device
08/22/2000US6108805 Domino scan architecture and domino scan flip-flop for the testing of domino and hybrid CMOS circuits
08/22/2000US6108796 Fault tolerant multi-drop communications system
08/22/2000US6107946 High speed serial link for fully duplexed data communication
08/22/2000US6107874 Semiconductor integrated circuit device produced from master slice and having operation mode easily changeable after selection on master slice
08/22/2000US6107867 Load termination sensing circuit
08/22/2000US6107863 Charge pump circuit and logic circuit
08/22/2000US6107857 Level converting circuit
08/22/2000US6107854 Variable speed path circuit and method
08/22/2000US6107837 Address decoding circuit
08/22/2000US6107836 Semiconductor integrated circuit device having power reduction mechanism
08/22/2000US6107835 Method and apparatus for a logic circuit with constant power consumption
08/22/2000US6107834 Charge sharing protection for domino circuits
08/22/2000US6107833 Output buffer circuit of IC circuit capable of suppressing power consumption
08/22/2000US6107832 Input/output circuit
08/22/2000US6107831 Level conversion circuit
08/22/2000US6107830 Integrated circuit device including CMOS tri-state drivers suitable for powerdown
08/22/2000US6107829 Low leakage tristatable MOS output driver
08/22/2000US6107828 Programmable buffer circuit and a mask ROM device having the same
08/22/2000US6107827 FPGA CLE with two independent carry chains
08/22/2000US6107826 Interconnect structure for FPGA with configurable delay locked loop
08/22/2000US6107825 Input/output circuitry for programmable logic devices
08/22/2000US6107824 Circuitry and methods for internal interconnection of programmable logic devices
08/22/2000US6107823 Programmable control multiplexing for input/output blocks (IOBs) in FPGA integrated circuits
08/22/2000US6107822 Logic element for a programmable logic integrated circuit
08/22/2000US6107821 On-chip logic analysis and method for using the same
08/22/2000US6107820 Redundancy circuitry for programmable logic devices with interleaved input circuits
08/22/2000US6107819 Universal non volatile logic gate
08/22/2000US6107815 Test circuit and testing method for function testing of electronic circuits
08/22/2000US6107700 Semiconductor device of hierarchical power source structure
08/17/2000DE19952698A1 Leseverstärker Sense amplifier
08/16/2000EP1028434A1 Dynamic logic circuit
08/15/2000US6104642 Method and apparatus for 1 of 4 register file design
08/15/2000US6104232 DC output level compensation circuit
08/15/2000US6104229 High voltage tolerable input buffer and method for operating same
08/15/2000US6104216 Differential amplifier having a reduced current dissipation
08/15/2000US6104214 Current mode logic circuit, source follower circuit, and flip flop circuit
08/15/2000US6104213 Domino logic circuit having a clocked precharge
08/15/2000US6104212 Common domino circuit evaluation device
08/15/2000US6104211 System for preventing radiation failures in programmable logic devices
08/15/2000US6104210 Method for avoiding bus contention in a digital circuit
08/15/2000US6104209 Low skew differential receiver with disable feature
08/15/2000US6104208 Programmable logic device incorporating function blocks operable as wide-shallow RAM
08/15/2000US6104207 Programmable logic device
08/15/2000US6104072 Analogue MISFET with threshold voltage adjuster
08/15/2000US6102963 Electrically erasable and reprogrammable, nonvolatile integrated storage device with in-system programming and verification (ISPAV) capabilities for supporting in-system reconfiguring of PLD's
08/10/2000WO2000011788A3 Driving circuit
08/09/2000EP1026827A1 Apparatus and method for proctecting a circuit during hot plugging
08/09/2000EP0695442B1 Strongly fail-safe interface based on concurrent checking
08/08/2000US6101623 Current reduction circuit for testing purpose
08/08/2000US6101137 Semiconductor memory device having delay locked loop (DLL)
08/08/2000US6101074 Power-up circuit for field programmable gate arrays
08/08/2000US6100751 Forward body biased field effect transistor providing decoupling capacitance
08/08/2000US6100747 Device for selecting design options in an integrated circuit
08/08/2000US6100744 Integrated circuit devices having improved internal voltage generators which reduce timing skew in buffer circuits therein
08/08/2000US6100727 Noise-immune dynamic driving circuit capable of suppressing generation of a feedthrough current and increase of a delay
08/08/2000US6100720 Low dissipation inverter circuit
08/08/2000US6100719 Low-voltage bus switch maintaining isolation under power-down conditions
08/08/2000US6100715 Methods for configuring FPGA's having variable grain blocks and logic for providing time-shared access to interconnect resources
08/08/2000US6100714 High density PLD structure with flexible logic built-in blocks
08/08/2000US6100712 Output driver circuit with jump start for current sink on demand
08/08/2000US6100563 Semiconductor device formed on SOI substrate
08/03/2000WO2000045514A1 Elimination of parasitic bjt current leakage path in logic circuits
08/03/2000WO2000045507A1 Data pulse receiver
08/03/2000WO2000045423A1 Method and apparatus for elimination of parasitic bipolar action in logic circuits
08/02/2000EP1024598A1 High speed low skew CMOS to ECL converter
08/02/2000EP1024597A2 Output circuit for use in a semiconductor integrated circuit
08/01/2000US6097634 Latch-type sensing circuit and program-verify circuit
08/01/2000US6097253 High speed process-controlled transresistance amplifier
08/01/2000US6097242 Threshold voltage compensation circuits for low voltage and low power CMOS integrated circuits
08/01/2000US6097237 Overshoot/undershoot protection scheme for low voltage output buffer
08/01/2000US6097236 Signal transfer system and method using an intermediate voltage
08/01/2000US6097227 Phase locked loop circuit and method of synchronizing internal synchronizing signal with reference signal
08/01/2000US6097223 Drive-current modulated output driver
08/01/2000US6097222 Symmetrical NOR gates
08/01/2000US6097221 Semiconductor integrated circuit capable of realizing logic functions
08/01/2000US6097220 Method and circuit for recycling charge
08/01/2000US6097219 Output buffer circuit with adjustable driving capability
08/01/2000US6097218 Method and device for isolating noise sensitive circuitry from switching current noise on semiconductor substrate
08/01/2000US6097217 MOS output buffer with overvoltage protection circuitry
08/01/2000US6097216 Integrated buffer circuits having improved noise immunity and TTL-to-CMOS signal conversion capability
08/01/2000US6097215 Low power voltage translation circuit
08/01/2000US6097212 Variable grain architecture for FPGA integrated circuits
08/01/2000US6097211 Configuration memory integrated circuit
08/01/2000US6097210 Multiplexer array with shifted input traces
08/01/2000US6097209 Erroneous operation protection circuit formed between data buses and intergrated circuit employing the same
08/01/2000US6097208 Signal-transfer system and semiconductor device for high-speed data transfer
08/01/2000US6097207 Robust domino circuit design for high stress conditions
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