Patents
Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996)
03/2000
03/21/2000US6040735 Reference voltage generators including first and second transistors of same conductivity type
03/21/2000US6040729 Digital output buffer for multiple voltage system
03/21/2000US6040724 Bus driver circuit having adjustable rise and fall times
03/21/2000US6040719 Input receiver for limiting current during reliability screening
03/21/2000US6040717 FRCPG: Forecasted restoration complementary pass gates
03/21/2000US6040716 Domino logic circuits, systems, and methods with precharge control based on completion of evaluation by the subsequent domino logic stage
03/21/2000US6040715 Output buffer control circuit that performs high speed operation by generating a predetermined width of a pulse based on an output control signal
03/21/2000US6040714 Method for providing two modes of I/O pad termination
03/21/2000US6040713 Buffer with fast edge propagation
03/21/2000US6040712 Apparatus and method for protecting a circuit during a hot socket condition
03/21/2000US6040711 CMOS output buffer having a switchable bulk line
03/21/2000US6040710 CML-CMOS conversion circuit
03/21/2000US6040707 Constant slew rate amplifier
03/21/2000US6040610 Semiconductor device
03/16/2000WO2000014878A1 Electronic circuit
03/16/2000CA2342918A1 Electronic circuit
03/15/2000EP0986177A2 Semiconductor integrated circuit apparatus
03/15/2000EP0985271A1 Input circuit for an integrated circuit
03/15/2000EP0789950A4 Apparatus for programmable circuit and signal switching
03/15/2000CN1247613A Unit for processing numeric and logical operations, for use in processors (CPUS) and in multicomputer systems
03/15/2000CN1247413A Output buffering device and method
03/14/2000US6038684 System and method for diagnosing errors in a multiprocessor system
03/14/2000US6038655 Microcontroller having register direct and register indirect addressing
03/14/2000US6038627 SRAM bus architecture and interconnect to an FPGA
03/14/2000US6038192 Memory cells for field programmable memory array
03/14/2000US6037828 Transmission line driver with high output impedance at power off
03/14/2000US6037820 Clock distribution circuit in a semiconductor integrated circuit
03/14/2000US6037816 Signal transmitting circuit, signal receiving circuit, signal transmitting/receiving circuit, signal transmitting method, signal receiving method, signal transmitting/receiving method, semiconductor integrated circuit, and control method thereof
03/14/2000US6037813 Semiconductor device capable of selecting operation mode based on clock frequency
03/14/2000US6037811 Current-controlled output buffer
03/14/2000US6037810 Electronic system having a multistage low noise output buffer system
03/14/2000US6037805 Integrated circuit device having small amplitude signal transmission
03/14/2000US6037804 Reduced power dynamic logic circuit that inhibits reevaluation of stable inputs
03/14/2000US6037803 Integrated circuit having two modes of I/O pad termination
03/14/2000US6037802 Tristate buffer having a bipolar transistor
03/14/2000US6037800 Method for programming a programmable gate array having shared signal lines for interconnect and configuration
03/14/2000US6037637 BiCMOS logical integrated circuit
03/09/2000WO2000013317A1 Dc output level compensation circuit
03/08/2000EP0984557A1 Output buffer circuit
03/08/2000EP0984360A2 Bus signal line driver
03/08/2000EP0983549A1 Redundancy circuitry for programmable logic devices with interleaved input circuits
03/07/2000US6034912 Semiconductor integrated circuit device and method of manufacturing the same
03/07/2000US6034857 Input/output buffer with overcurrent protection circuit
03/07/2000US6034563 Semiconductor integrated circuit having reduced current leakage and high speed
03/07/2000US6034555 Semiconductor integrated circuit with input/output interface adapted for small-amplitude operation
03/07/2000US6034551 Low voltage differential dual receiver
03/07/2000US6034550 Multi-power IC device
03/07/2000US6034549 Level shift circuit
03/07/2000US6034548 Programmable delay element
03/07/2000US6034547 Method and apparatus for universal program controlled bus
03/07/2000US6034545 Macrocell for data processing circuit
03/07/2000US6034544 Programmable input/output block (IOB) in FPGA integrated circuits
03/07/2000US6034543 Programmable logic array structure having reduced parasitic loading
03/07/2000US6034542 Bus structure for modularized chip with FPGA modules
03/07/2000US6034541 In-system programmable interconnect circuit
03/07/2000US6034540 Programmable logic integrated circuit architecture incorporating a lonely register
03/07/2000US6034539 Bonding-option architecture for integrated circuitry
03/07/2000US6034537 Driver circuits
03/07/2000US6034536 Redundancy circuitry for logic circuits
03/07/2000US6034400 Integrated circuit with improved electrostatic discharge protection including multi-level inductor
03/02/2000WO2000011788A2 Driving circuit
03/02/2000WO2000011787A1 Output driving circuit
03/02/2000DE19940231A1 Bootstrapped CMOS driver for driving large capacitive load; has drive unit. with pull-up and pull-down devices and bootstrap unit for amplifying pull-up and pull-down devices' gate voltages
03/02/2000DE19929600A1 Asynchronous differential logic circuit (ASDL) using charge recycling technique for semiconductor circuit design
03/02/2000DE19859516C1 Integrated circuit with decoder element
03/02/2000DE19841757C1 Output driver output signal matching circuit for integrated circuit meeting required output signal slope
03/01/2000CN1245999A Master backup reverse device
02/2000
02/29/2000US6032268 Processor condition sensing circuits, systems and methods
02/29/2000US6032209 Hot-swappable high speed point-to-point interface
02/29/2000US6031778 Semiconductor integrated circuit
02/29/2000US6031413 Semiconductor integrated circuit using direct coupled FET logic configuration for low power consumption
02/29/2000US6031410 Multiplexor composed of dynamic latches
02/29/2000US6031403 Pull-up and pull-down circuits
02/29/2000US6031402 Clock synchronizing circuit with power save mode
02/29/2000US6031396 Circuit for synchronizing asynchronous inputs using dual edge logic design
02/29/2000US6031395 CMOS semiconductor circuit for generating high output voltage
02/29/2000US6031393 Pass gate input buffer for a mixed voltage environment
02/29/2000US6031392 TTL input stage for negative supply systems
02/29/2000US6031391 Configuration memory integrated circuit
02/29/2000US6031390 Asynchronous registers with embedded acknowledge collection
02/29/2000US6031389 Slew rate limited output driver
02/29/2000US6031388 Postcharged interconnection speed-up circuit
02/24/2000DE19855445C1 Arrangement for reducing electromagnetic emission for ICs
02/24/2000DE19843159C1 Integrated circuit for redundancy evaluation
02/23/2000EP0980555A1 Method and apparatus for compiling one circuit in a sequence of circuits within a programmable gate array
02/23/2000EP0980546A1 Non-intrusive power control for computer systems
02/22/2000US6029236 Field programmable gate array with high speed SRAM based configurable function block configurable as high performance logic or block of SRAM
02/22/2000US6028809 Programmable logic device incorporating a tristateable logic array block
02/22/2000US6028808 Programmable logic array integrated circuits
02/22/2000US6028800 Sense amplifier driver having variable power-supply voltage
02/22/2000US6028474 Semiconductor integrated circuit
02/22/2000US6028468 Voltage-level shifter
02/22/2000US6028467 Differential output circuit
02/22/2000US6028463 Programmable clock manager for a programmable logic device that can generate at least two different output clocks
02/22/2000US6028458 Differential amplifier with input signal determined standby state
02/22/2000US6028455 Signal transmitting circuit, signal receiving circuit, signal transmitting/receiving circuit, signal transmitting method, signal transmitting/receiving method, semiconductor integrated circuit, and control method thereof
02/22/2000US6028454 Dynamic current mode logic family
02/22/2000US6028453 Charge recycling differential logic (CRDL) circuit having true single-phase clocking scheme
02/22/2000US6028451 Method and apparatus for topology dependent slew rate control
02/22/2000US6028450 Programmable input/output circuit with pull-up bias control