Patents
Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996)
05/2001
05/09/2001CN1065675C Electromagnetic-noise protection circuit
05/08/2001US6230275 Circuit for powering down unused configuration bits to minimize power consumption
05/08/2001US6229396 Controlled impedance transformer line driver
05/08/2001US6229380 Output buffer switching circuit
05/08/2001US6229365 Semiconductor integrated circuit device operating stably at a plurality of power supply voltage levels
05/08/2001US6229360 High speed synchronization circuit in semiconductor integrated circuit
05/08/2001US6229353 Source-coupled logic with reference controlled inputs
05/08/2001US6229349 AC input cell for data acquisition circuits
05/08/2001US6229342 Circuits and method for body contacted and backgated transistors
05/08/2001US6229341 Signal transmitting circuit, signal receiving circuit, signal transmitting/receiving circuit, signal transmitting method, signal receiving method, signal transmitting/receiving method, semiconductor integrated circuit, and control method thereof
05/08/2001US6229340 Semiconductor integrated circuit
05/08/2001US6229338 Method and apparatus for reducing dynamic programmable logic array propagation delay
05/08/2001US6229337 High-density programmable logic device with flexible local connections and multiplexer based global interconnections
05/08/2001US6229336 Programmable integrated circuit device with slew control and skew control
05/08/2001US6229335 Input/output buffer capable of supporting a multiple of transmission logic buses
05/08/2001US6229333 Apparatus for reducing induced switching transients
05/08/2001US6229332 Superconductive logic gate and random access memory
05/03/2001WO2001031791A1 Circuit for converting the voltage level of a digital signal
05/03/2001WO2001031790A1 Multiple redundant reliability enhancement method for integrated circuits and transistors
05/03/2001WO2001031789A2 Magnetic logic device having magnetic quantum dots
05/03/2001WO2001031787A1 Multi-voltage power-up stable input/output buffer circuit in a disc drive
05/03/2001WO2001031516A2 An emulation system having a efficient emulation signal routing architecture
05/03/2001US20010000661 Logic circuit utilizing capacitive coupling, an AD converter and a DA converter
05/03/2001US20010000653 Gate circuit and semiconductor circuit to process low amplitude signals, memory, processor and information processing system manufactured by use of them
05/03/2001US20010000652 Output synchronization-free, high-fanin dynamic NOR gate
05/03/2001DE19952743A1 High speed and low noise output buffer in digital circuit, includes speed transistor which pulls down control voltage of output transistor to potential having potential difference from expected final potential
05/03/2001DE10053366A1 Input buffer circuit has amplifier circuit which is operated after elapse of preset time from reception of input signal from buffer
05/03/2001CA2386426A1 Elements logiques magnetiques
05/02/2001EP1096682A1 Buffer circuit
05/02/2001EP1096671A1 A differential operational amplifier
05/02/2001EP1095452A1 A cmos driver
05/02/2001EP1095451A1 Level shifting circuit arrangement and optical read/write device including the circuit arrangement
05/02/2001CN1293488A Single-terminal input voltage level converter controlled by grid voltage
05/02/2001CN1293434A Buff circuit
05/02/2001CN1293400A Method for debugging basic I/O system of keyboard for developing notebook computer
05/01/2001US6226201 Techniques to configure nonvolatile cells and cell arrays
05/01/2001US6225935 Biphase-encoded signal processing employing passive and/or semi-passive transistor circuits
05/01/2001US6225855 Reference voltage generation circuit using source followers
05/01/2001US6225852 Use of biased high threshold voltage transistor to eliminate standby current in low voltage integrated circuits
05/01/2001US6225846 Body voltage controlled semiconductor integrated circuit
05/01/2001US6225844 Output buffer circuit that can be stably operated at low slew rate
05/01/2001US6225839 Buffer circuit
05/01/2001US6225838 Integrated circuit buffers having reduced power consumption requirements
05/01/2001US6225830 Differential mode logic gate having NAND and NOR portions to produce complementary outputs
05/01/2001US6225829 device signature generator
05/01/2001US6225827 Dynamic logic circuit and self-timed pipelined datapath system
05/01/2001US6225826 Single ended domino compatible dual function generator circuits
05/01/2001US6225825 Industrial control systems having input/output circuits with programmable input/output characteristics
05/01/2001US6225823 Input/output circuitry for programmable logic devices
05/01/2001US6225822 Fast signal conductor networks for programmable logic devices
05/01/2001US6225820 Semiconductor device having improved input buffer circuit
04/2001
04/26/2001WO2001029968A1 Field programmable gate array (fpga) cell
04/26/2001WO2001029967A1 Method and apparatus for controlling compensated buffers
04/26/2001WO2001029678A1 Apparatus and method for topography dependent signaling
04/26/2001WO2001029569A1 Apparatus and method for programmable parametric toggle testing of digital cmos pads
04/26/2001US20010000425 Level shift circuit
04/26/2001DE19951129A1 Circuit varying voltage level of digital signal from first to second level
04/26/2001DE19950361A1 Signal converter with dynamically adjustable reference voltage e.g. for computer systems, uses controlled reference voltage generator for converting the adjustable reference voltage in first potential for application by input circuit
04/26/2001DE19950359A1 I/O buffer for transmission bus of high frequency and low oscillation voltage e.g. GTL-plus bus uses active pull-up components for improving ring-back effect
04/26/2001DE19949843A1 Level conversion circuit for high frequency low-voltage signals between different technology devices has series and parallel resistors connected to transformer
04/26/2001CA2388498A1 Apparatus and method for programmable parametric toggle testing of digital cmos pads
04/25/2001EP1094607A1 Programmable cell for FPGA
04/25/2001EP1094599A1 A circuit for compensating for the difference between the Vgs voltages of two MOS transistors
04/25/2001CN1292530A Dynamic latch receiver with automatic reset pointer
04/25/2001CN1065084C Double-way voltage changer
04/24/2001US6223313 Method and apparatus for controlling and observing data in a logic block-based asic
04/24/2001US6223199 Method and apparatus for an N-NARY HPG gate
04/24/2001US6222791 Slew tolerant clock input buffer and a self-timed memory core thereof
04/24/2001US6222757 Configuration memory architecture for FPGA
04/24/2001US6222419 Over-sampling type clock recovery circuit using majority determination
04/24/2001US6222410 Semiconductor circuit
04/24/2001US6222403 Slew rate output circuit with an improved driving capability of driving an output MOS field effect transistor
04/24/2001US6222397 Output circuit with switching function
04/24/2001US6222396 Electronic system having a multistage low noise output buffer system
04/24/2001US6222391 Semiconductor integrated circuit
04/24/2001US6222390 Method and circuit for recycling charge
04/24/2001US6222389 Assisted gunning transceiver logic (AGTL) bus driver
04/24/2001US6222388 Low voltage differential driver with multiple drive strengths
04/24/2001US6222387 Overvoltage tolerant integrated circuit input/output interface
04/24/2001US6222386 Method and apparatus for providing a low voltage level shift
04/24/2001US6222385 Level shifter circuit
04/24/2001US6222384 Level shifter circuit
04/24/2001US6222383 Controlled PMOS load on a CMOS PLA
04/24/2001US6222382 Redundancy circuitry for programmable logic devices with interleaved input circuits
04/24/2001US6222381 Self-configurable parallel processing system made from self-dual code/data processing cells utilizing a non-shifting memory
04/19/2001WO2001028097A1 Heterogeneous interconnection architecture for programmable logic devices
04/19/2001US20010000296 Clocked logic gate circuit
04/18/2001EP1093226A1 Electronic driver circuit with multiplexer for alternatively driving a load or a busline, and method
04/18/2001EP1093128A2 Data storage circuits using a low threshold voltage output enable circuit
04/18/2001EP1092268A2 Interconnection and input/output resources for programmable logic integrated circuit devices
04/18/2001EP1092267A1 Multiple-valued logic circuit architecture: supplementary symmetrical logic circuit structure (sus-loc)
04/18/2001EP0834115B1 Circuit for producing logic elements representable by threshold equations
04/17/2001US6219797 Microcontroller with selectable oscillator source
04/17/2001US6219687 Method and apparatus for an N-nary Sum/HPG gate
04/17/2001US6219686 Method and apparatus for an N-NARY sum/HPG adder/subtractor gate
04/17/2001US6219284 Programmable logic device with multi-port memory
04/17/2001US6218901 High speed differential output driver with increased voltage swing and predrive common mode adjustment
04/17/2001US6218895 Multiple well transistor circuits having forward body bias
04/17/2001US6218892 Differential circuits employing forward body bias
04/17/2001US6218886 Device for compensating process and operating parameter variations in CMOS integrated circuits