| Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996) |
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| 08/01/2000 | US6097113 MOS integrated circuit device operating with low power consumption |
| 08/01/2000 | US6097073 Triangular semiconductor or gate |
| 08/01/2000 | US6097036 Semiconductor logic element and apparatus using thereof |
| 08/01/2000 | CA2192426C Bidirectional voltage translator |
| 07/27/2000 | WO2000044095A2 Fpga integrated circuit having embedded sram memory blocks and interconnect channel for broadcasting address and control signals |
| 07/27/2000 | WO2000019313A3 Method for executing individual algorithms by means of a reconfigurable circuit and device for carrying out such a method |
| 07/27/2000 | WO2000017772A3 Configurable hardware block |
| 07/26/2000 | EP1022744A1 Charge sharing circuit for fanout buffer |
| 07/25/2000 | US6094089 Current limiting receiver with impedance/load matching for a powered down receiver chip |
| 07/25/2000 | US6094083 Voltage converting buffer circuit capable of realizing high speed flip-flop action in the flip-flop circuit |
| 07/25/2000 | US6094075 Current control technique |
| 07/25/2000 | US6094074 High speed common mode logic circuit |
| 07/25/2000 | US6094072 Methods and apparatus for bipolar elimination in silicon-on-insulator (SOI) domino circuits |
| 07/25/2000 | US6094071 Initialization of floating body dynamic circuitry |
| 07/25/2000 | US6094070 Interface circuit |
| 07/25/2000 | US6094069 Semiconductor integrated circuit having controlled output resistance of an output buffer circuit |
| 07/25/2000 | US6094068 CMOS logic circuit and method of driving the same |
| 07/25/2000 | US6094067 Output buffer circuit |
| 07/25/2000 | US6094066 Tiered routing architecture for field programmable gate arrays |
| 07/25/2000 | US6094065 Integrated circuit with field programmable and application specific logic areas |
| 07/25/2000 | US6094064 Programmable logic device incorporating and input/output overflow bus |
| 07/25/2000 | US6094063 Method for level shifting logic signal voltage levels |
| 07/25/2000 | CA2179124C Process compensated integrated circuit output driver |
| 07/20/2000 | WO2000042514A1 Circuit for powering down unused configuration bits to minimize power consumption |
| 07/19/2000 | EP1020787A2 Circuit with voltage adjustment |
| 07/19/2000 | EP1020030A2 Programmable gate array |
| 07/19/2000 | EP0875093B1 Output buffer switching circuit |
| 07/18/2000 | US6092219 Method for use of bus parking states to communicate diagnostic information |
| 07/18/2000 | US6092218 System and method for self-referential accesses in a multiprocessor computer |
| 07/18/2000 | US6091656 Semiconductor integrated circuit device having a hierarchical power source configuration |
| 07/18/2000 | US6091645 Programmable read ports and write ports for I/O buses in a field programmable memory array |
| 07/18/2000 | US6091351 A/D converter and level shifter |
| 07/18/2000 | US6091277 Input buffer circuit for semiconductor IC circuit |
| 07/18/2000 | US6091267 Logic circuits |
| 07/18/2000 | US6091266 Circuit arrangement for a digital circuit using differential logic |
| 07/18/2000 | US6091265 Low voltage CMOS input buffer with undershoot/overshoot protection |
| 07/18/2000 | US6091264 Schmitt trigger input stage |
| 07/18/2000 | US6091263 Rapidly reconfigurable FPGA having a multiple region architecture with reconfiguration caches useable as data RAM |
| 07/18/2000 | US6091262 Field programmable gate array with mask programmable I/O drivers |
| 07/18/2000 | US6091259 Apparatus for accelerating digital signal transitions using a transition acceleration circuit and a transition termination circuit |
| 07/18/2000 | US6091258 Redundancy circuitry for logic circuits |
| 07/18/2000 | US6091165 Method and apparatus to reduce peak electro-magnetic emissions from ground and power planes |
| 07/18/2000 | US6090153 Multi-threshold-voltage differential cascode voltage switch (DCVS) circuits |
| 07/18/2000 | CA2171690C Circuit for clock signal extraction from a high speed data stream |
| 07/13/2000 | WO2000041181A2 Seu hardening circuit |
| 07/12/2000 | EP1018745A1 Improved driver circuit |
| 07/12/2000 | CN1259798A Level shifting circuit, and input/output circuit therewith |
| 07/12/2000 | CN1259743A Strength-adjustable driving circuit and adjustable method |
| 07/12/2000 | CN1259742A Improved driving device circuit |
| 07/11/2000 | US6088756 Five state bus driver having both voltage and current source modes of operation |
| 07/11/2000 | US6088526 Scalable multiple level tab oriented interconnect architecture |
| 07/11/2000 | US6088271 Method and apparatus for transferring signal to circuit without waveform distortion |
| 07/11/2000 | US6087899 Optical transmitter module, and semiconductor integrated circuit capable of increasing gain and band of amplifier constructed from FET |
| 07/11/2000 | US6087895 Semiconductor integrated circuit having power lines separately routed to input circuits and circuit unit using it |
| 07/11/2000 | US6087893 Semiconductor integrated circuit having suppressed leakage currents |
| 07/11/2000 | US6087887 Signal routing circuits having selective high impedance and low impedance output states |
| 07/11/2000 | US6087885 Semiconductor device allowing fast and stable transmission of signals |
| 07/11/2000 | US6087881 Integrated circuit dual level shift predrive circuit |
| 07/11/2000 | US6087880 Level shifter |
| 07/11/2000 | US6087879 Semiconductor integrated circuit device and low-amplitude signal receiving method |
| 07/11/2000 | US6087878 Signal output circuit, parallel interface circuit and printer apparatus |
| 07/11/2000 | US6087870 Output circuit which switches an output state in accordance with a timing signal and a delay signal of the timing signal |
| 07/11/2000 | US6087855 High performance dynamic multiplexers without clocked NFET |
| 07/11/2000 | US6087854 High speed line driver with direct and complementary outputs |
| 07/11/2000 | US6087853 Controlled output impedance buffer using CMOS technology |
| 07/11/2000 | US6087851 Method and apparatus for configuring a semiconductor device for compatibility with multiple logic interfaces |
| 07/11/2000 | US6087850 Operation circuit |
| 07/11/2000 | US6087849 Soft error immunity in CMOS circuits with large shared diffusion areas |
| 07/11/2000 | US6087847 Impedance control circuit |
| 07/11/2000 | CA2032519C Avoiding latent errors in a logic network for majority select ion of binary signals |
| 07/06/2000 | WO2000039929A1 Single ended domino compatible dual function generator circuits |
| 07/06/2000 | WO2000039928A1 High speed pin driver integrated circuit architecture for commercial automatic test equipment applications |
| 07/06/2000 | DE19958144A1 Programmierbare Zwischenverbindungszelle zum wahlweisen Verbinden von Schaltkreisknoten in einem integrierten Schaltkreis Programmable interconnect cell for selectively connecting circuit nodes in an integrated circuit |
| 07/06/2000 | DE19958143A1 Programmable connection for logic IC circuit nodes using switching FET with floating gate coupled to floating gate of read FET |
| 07/06/2000 | DE19949628A1 Clocked input voltage level transfer for use between integrated circuit devices, uses transistors and series inverters for gate-controlled voltage level transfer between first and second signals |
| 07/05/2000 | EP1017174A1 Circuit and methods for implementing autonomous sequential logic |
| 07/05/2000 | EP1016968A2 Logic circuit having error detection function |
| 07/05/2000 | EP1016143A2 Electrode means, comprising polymer materials, with or without functional elements and an electrode device formed of said means |
| 07/04/2000 | US6085033 Method for determining bit element values for driver impedance control |
| 07/04/2000 | US6084851 Demodulating method and apparatus, receiving method and apparatus, and communication apparatus |
| 07/04/2000 | US6084635 Solid state image sensor |
| 07/04/2000 | US6084464 On-chip decoupling capacitor system with parallel fuse |
| 07/04/2000 | US6084459 Voltage level shifting circuit |
| 07/04/2000 | US6084444 Buffer driver reference circuit |
| 07/04/2000 | US6084438 Data determination circuit |
| 07/04/2000 | US6084437 Logic circuit utilizing pass transistors and logic gate |
| 07/04/2000 | US6084435 Logic circuit |
| 07/04/2000 | US6084434 Adjustable output driver circuit |
| 07/04/2000 | US6084433 Integrated circuit SCSI input receiver having precision high speed input buffer with hysteresis |
| 07/04/2000 | US6084431 Output circuit providing protection against external voltages in excess of power-supply voltage |
| 07/04/2000 | US6084430 Input buffer for a mixed voltage environment |
| 07/04/2000 | US6084429 PLD having a window pane architecture with segmented and staggered interconnect wiring between logic block arrays |
| 07/04/2000 | US6084428 Programmable integrated circuit having shared programming conductors between columns of logic modules |
| 07/04/2000 | US6084427 Programmable logic devices with enhanced multiplexing capabilities |
| 07/04/2000 | US6084273 Analogue misfet with threshold voltage adjuster |
| 06/29/2000 | WO2000038322A1 Overvoltage-protected i/o buffer |
| 06/29/2000 | WO2000038321A1 A method and apparatus for reducing signal transmission delay using skewed gates |
| 06/29/2000 | WO2000038315A1 Level shift circuit |
| 06/29/2000 | WO2000038236A1 Cmos high-to-low voltage buffer |
| 06/29/2000 | DE19860390A1 Programmable logic device uses logic arrays providing programmable AND plane and programmable OR plane in combination with memory or shift register cells |