| Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996) |
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| 06/29/2000 | CA2355956A1 Level shift circuit |
| 06/28/2000 | EP1014585A2 Level-shifting circuit and input and output circuits using the same |
| 06/28/2000 | EP1014584A1 Data transmitter |
| 06/28/2000 | EP1014583A1 Multi-stage data anticipation driver and method for an integrated circuit device |
| 06/28/2000 | EP1014582A1 Digital signal transmitter and receiver using source based reference logic levels |
| 06/28/2000 | EP1014581A1 Adjustable strength driver circuit and method of adjustment |
| 06/28/2000 | EP1014379A1 Integrated circuit with decoder element |
| 06/28/2000 | EP1014259A1 A multi-functional arithmetic apparatus with multi value-states |
| 06/28/2000 | EP1012978A1 An inverse toggle xor and xnor circuit |
| 06/28/2000 | EP1012977A1 Logic function module for field programmable array |
| 06/28/2000 | EP1012971A1 Forward body bias transistor circuits |
| 06/28/2000 | CN1258101A Elimination of parasitic double-pole effect of insulator substrate epitaxial silicon |
| 06/27/2000 | US6081903 Method of the self-synchronization of configurable elements of a programmable unit |
| 06/27/2000 | US6081825 Semiconductor device, semiconductor circuit using the device, and correlation calculation device, signal converter, and signal processing system using the circuit |
| 06/27/2000 | US6081473 FPGA integrated circuit having embedded sram memory blocks each with statically and dynamically controllable read mode |
| 06/27/2000 | US6081470 All optics type semiconductor image storage apparatus, and all optics type semiconductor logical operation apparatus |
| 06/27/2000 | US6081412 Gate oxide breakdown protection circuit for deep submicron processes |
| 06/27/2000 | US6081152 Output buffer with protective limit of voltage across terminals of devices within the output buffer |
| 06/27/2000 | US6081136 Dynamic NOR gates for NAND decode |
| 06/27/2000 | US6081135 Device and method to reduce power consumption in integrated semiconductor devices |
| 06/27/2000 | US6081133 Universal receiver device |
| 06/27/2000 | US6081132 High voltage drive output buffer for low Voltage integrated circuits |
| 06/27/2000 | US6081131 Logical amplitude level conversion circuit, liquid crystal device and electronic apparatus |
| 06/27/2000 | US6081130 Clock controlled exclusive or circuit |
| 06/27/2000 | US6081129 Field programmable gate array having testable antifuse programming architecture and method therefore |
| 06/27/2000 | US6081011 CMOS logic gate having buried channel NMOS transistor for semiconductor devices and fabrication method of the same |
| 06/27/2000 | US6081004 BiCMOS compacted logic array |
| 06/27/2000 | US6080206 Method of laying out interconnections |
| 06/27/2000 | US6080205 Semiconductor wafer serving as master-slice with built-in additional current drivers for semi-custom-made integrated circuit device |
| 06/22/2000 | WO2000036749A1 Methods for configuring fpga's for providing symmetric routing to differently-directed interconnect resources |
| 06/22/2000 | WO2000036748A1 Fpga integrated circuit having embedded sram memory blocks each with statically and dynamically controllable read mode |
| 06/22/2000 | WO2000036747A1 Methods for configuring fpga's having variable grain components for providing time-shared access to interconnect resources |
| 06/22/2000 | WO2000036746A1 Methods for configuring fpga's having variable grain blocks and shared logic for providing time-shared access to interconnect resources |
| 06/21/2000 | EP1011197A1 Method for generating differential tri-states and differential tri-state circuit |
| 06/21/2000 | EP1011196A1 Input-circuit, output-circuit, input-output circuit and method of processing input signals |
| 06/21/2000 | EP1010250A1 Function block architecture for gate array |
| 06/21/2000 | EP1010245A1 System for compensating for temperature induced delay variation in an integrated circuit |
| 06/21/2000 | EP1010205A2 Lone-electron circuit arrangement, operating mode, and application for adding binary numbers |
| 06/21/2000 | EP1010053A1 Interface circuit for full-custom and semi-custom timing domains |
| 06/21/2000 | EP1010013A2 Impedance control circuit |
| 06/20/2000 | US6078209 System and method for controlled performance degradation in electronic circuits |
| 06/20/2000 | US6078207 Output amplitude regulating circuit |
| 06/20/2000 | US6078206 Small amplitude signal output circuit |
| 06/20/2000 | US6078197 Output driver circuit utilizing floating wells |
| 06/20/2000 | US6078196 Data enabled logic circuits |
| 06/20/2000 | US6078195 Logic blocks with mixed low and regular Vt MOSFET devices for VLSI design in the deep sub-micron regime |
| 06/20/2000 | US6078194 Logic gates for reducing power consumption of gallium arsenide integrated circuits |
| 06/20/2000 | US6078193 Apparatus and method for providing a static mode for dynamic logic circuits |
| 06/20/2000 | US6078191 Programmable application specific integrated circuit and logic cell |
| 06/20/2000 | US6078190 Threshold logic with improved signal-to-noise ratio |
| 06/15/2000 | WO2000035149A1 Damping circuit for two-wire bus system |
| 06/15/2000 | WO2000035093A1 Efficient interconnect network for use in fpga device having variable grain architecture |
| 06/15/2000 | DE19951620A1 Pull-up type differential bus driver for signal transmission between semiconductor chips, supplies higher voltage to PMOS transistor only when voltage of either of signal lines is higher |
| 06/15/2000 | DE19910352C1 Digitally controlled compensation unit for driver circuit used for input=output pad cells of integrated circuit |
| 06/14/2000 | EP1009136A2 Controlled current source for line drivers and receivers |
| 06/14/2000 | EP1009097A1 Variable driver for reducing overshoot, undershoot, and noise in an output buffer |
| 06/13/2000 | US6075745 Field programmable memory array |
| 06/13/2000 | US6075404 Substrate biasing circuit and semiconductor integrated circuit device |
| 06/13/2000 | US6075386 Dynamic logic gate with relaxed timing requirements and output state holding |
| 06/13/2000 | US6075385 Intelligent precharger for a dynamic bus |
| 06/13/2000 | US6075384 Current-mode bidirectional input/output buffer |
| 06/13/2000 | US6075383 GTL output amplifier for coupling an input signal present at the input into a transmission line present at the output |
| 06/13/2000 | US6075382 Buffer for integrated circuit pads |
| 06/13/2000 | US6075380 Programmable logic device with expandable-width memory regions |
| 06/13/2000 | US6075379 Slew rate control circuit |
| 06/09/2000 | CA2289357A1 Digital signal transmitter and receiver using source based reference logic levels |
| 06/08/2000 | WO2000033463A1 Device for reducing electromagnetic emission in integrated circuits provided with driver stages |
| 06/08/2000 | DE19856283A1 Bedämpfungsschaltung für Zweidraht-Bussystem Damping circuit for two-wire bus system |
| 06/07/2000 | EP1006658A1 Low dissipation biCMOS ECL/CMOS interface |
| 06/07/2000 | EP1006657A2 Constant impedance, low noise CMOS buffer |
| 06/07/2000 | EP1006656A2 MOS transistor output circuit |
| 06/07/2000 | EP1006579A1 Device for compensating process and operating parameter variations in CMOS integrated circuits |
| 06/07/2000 | CN1255691A Power supply circuit builting integrated circuit |
| 06/06/2000 | US6072783 I/O module for a serial multiplex data system with a programmable communication module selector |
| 06/06/2000 | US6072728 Data output buffer |
| 06/06/2000 | US6072720 Nonvolatile reprogrammable interconnect cell with programmable buried bitline |
| 06/06/2000 | US6072528 Solid state image sensor |
| 06/06/2000 | US6072413 Current output type digital-to-analog converter capable of suppressing output current fluctuation using a current mirror |
| 06/06/2000 | US6072366 Receiver capable of outputting a high quality signal without regard to an input signal level |
| 06/06/2000 | US6072354 Semiconductor device output buffer circuit for LSI |
| 06/06/2000 | US6072353 Logic circuit with overdriven off-state switching |
| 06/06/2000 | US6072351 Output buffer for making a 5.0 volt compatible input/output in a 2.5 volt semiconductor process |
| 06/06/2000 | US6072342 Timed one-shot active termination device |
| 06/06/2000 | US6072335 Inverter control circuit |
| 06/06/2000 | US6072334 Signal converter with a dynamically adjustable reference voltage and chipset including the same |
| 06/06/2000 | US6072333 Tristate output circuit |
| 06/06/2000 | US6072332 Variable depth memories for programmable logic devices |
| 06/06/2000 | US6072331 Amplifier for active terminator |
| 06/06/2000 | US6072330 Ring effect improvement for high speed transmission of digital data |
| 06/06/2000 | US6072329 Method and system of minimizing simultaneous switching noise in an electronic device |
| 06/06/2000 | US6072328 IC devices with a built-in circuit for protecting internal information |
| 06/02/2000 | WO2000031871A1 Improved flip-flops and other logic circuits and techniques for improving layouts of integrated circuits |
| 06/02/2000 | WO2000031620A1 Fully programmable and configurable application specific integrated circuit |
| 05/31/2000 | EP1005163A2 Programmable logic device architectures |
| 05/31/2000 | EP1005162A2 Circuit and method for implementing combinatorial logic functions |
| 05/31/2000 | DE19956465A1 Control circuit for data I/O buffer has control unit that controls I/O buffer so that data input buffer is deactivated in read mode and data output buffer is activated |
| 05/31/2000 | DE19856465A1 Coupling automation device to IBM compatible personal computer by converting voltage levels using rack-mounted circuitry |
| 05/31/2000 | DE19851909A1 Driver for power switch in PWM power supply circuits temporarily charges output inverter transistor capacitance so inverter output is pulled more rapidly towards reference potential |
| 05/31/2000 | CN1255211A Non-intrusive power control for computer systems |
| 05/31/2000 | CN1254989A Scannable latch circuit for providing scan output from it and its method |