Patents
Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996)
02/2000
02/22/2000US6028449 Integrated circuit I/O buffer having pull-up to voltages greater than transistor tolerance
02/22/2000US6028448 Circuitry architecture and method for improving output tri-state time
02/22/2000US6028447 FPGA having predictable open-drain drive mode
02/22/2000US6028446 Flexible synchronous and asynchronous circuits for a very high density programmable logic device
02/22/2000US6028444 Three-statable net driver for antifuse field programmable gate array
02/22/2000CA2165596C Output buffer circuit for high-speed logic operation
02/17/2000WO2000008549A1 Broken stack priority encoder
02/17/2000CA2339358A1 Broken stack priority encoder
02/16/2000EP0980145A1 Output buffer circuit
02/16/2000EP0980144A2 Transceiver driver with programmable edge rate control independent of fabrication process, supply voltage and temperature
02/16/2000CN1244971A Latch circuit
02/15/2000US6026481 Microprocessor with distributed registers accessible by programmable logic device
02/15/2000US6026227 FPGA logic cell internal structure including pair of look-up tables
02/15/2000US6026051 Low skew differential receiver with disable feature
02/15/2000US6025792 Analog compensation circuitry for integrated circuit input/output circuitry
02/15/2000US6025740 Clock feeding circuit and method for adjusting clock skew
02/15/2000US6025739 CMOS driver circuit for providing a logic function while reducing pass-through current
02/15/2000US6025738 Gain enhanced split drive buffer
02/15/2000US6025737 Circuitry for a low internal voltage integrated circuit
02/15/2000US6025736 Fast reprogrammable logic with active links between cells
02/15/2000US6025735 Programmable switch matrix and method of programming
02/15/2000CA2176459C Signalling system
02/09/2000EP0978944A1 Wiring of cells in logic arrays
02/09/2000EP0978943A2 Calibration circuit
02/09/2000CN1244070A Voltage adaptable interface circuit
02/09/2000CN1244069A Programmable lead assignment for semiconductor device
02/08/2000US6023439 Programmable logic array integrated circuits
02/08/2000US6023421 Selective connectivity between memory sub-arrays and a hierarchical bit line structure in a memory array
02/08/2000US6023176 Input buffer
02/08/2000US6023175 Level interface circuit
02/08/2000US6023174 Adjustable, full CMOS input buffer for TTL, CMOS, or low swing input protocols
02/08/2000US6023157 Constant-current circuit for logic circuit in integrated semiconductor
02/03/2000WO2000005818A1 Cmos output amplifier independent of temperature, supply voltage and manufacturing quality of transistors
02/03/2000WO2000005655A1 Hot-swappable high speed point-to-point interface
02/03/2000DE19916437A1 Output buffer circuit e.g. for use in conjunction with universal serial buffer
02/02/2000EP0976059A1 A field programmable processor
02/02/2000EP0847624A4 Multiple logic family compatible output driver
02/02/2000EP0822908B1 Dc input cell for data acquisition circuits
02/02/2000EP0822907B1 Ac input cell for data acquisition circuits
02/02/2000CN1243616A Zero-delay slew-rate controlled output buffer
02/01/2000US6021490 Run-time reconfiguration method for programmable units
02/01/2000US6021071 Semiconductor integrated circuit
02/01/2000US6020780 Substrate potential control circuit capable of making a substrate potential change in response to a power-supply voltage
02/01/2000US6020778 Transmission gate including body effect compensation circuit
02/01/2000US6020776 Efficient multiplexer structure for use in FPGA logic blocks
02/01/2000US6020766 Input amplifier with unilateral current shutoff for input signals with steep edges
02/01/2000US6020764 Emitter coupled logic circuitry with additional discharge path
02/01/2000US6020762 Digital voltage translator and its method of operation
02/01/2000US6020761 Input buffers and controlling methods for integrated circuit memory devices that operate with low voltage transistor-transistor logic (LVTTL) and with stub series terminated transceiver logic (SSTL)
02/01/2000US6020760 I/O buffer circuit with pin multiplexing
02/01/2000US6020759 Programmable logic array device with random access memory configurable as product terms
02/01/2000US6020758 Partially reconfigurable programmable logic device
02/01/2000US6020757 Slew rate selection circuit for a programmable device
02/01/2000US6020756 Multiplexer enhanced configurable logic block
02/01/2000US6020755 Hybrid programmable gate arrays
02/01/2000US6020754 Look up table threshold gates
02/01/2000US6020730 Current source and method therefor
01/2000
01/27/2000WO2000004641A1 Apparatus and methods for high throughput self-timed domino circuits
01/27/2000DE19832101A1 Implementing basic ternary circuits using CMOS technology
01/26/2000EP0974195A1 Input/output buffer supporting multiple i/o standards
01/26/2000EP0974082A1 Output buffer having a predriver for compensating slew rate against process variations
01/26/2000CN1242887A System connector
01/25/2000US6018559 Chain-connected shift register and programmable logic circuit whose logic function is changeable in real time
01/25/2000US6018490 Programmable logic array integrated circuits
01/25/2000US6018450 Output driver with overshoot and undershoot protection
01/25/2000US6018261 Method and apparatus for providing a low voltage level shift
01/25/2000US6018257 Output drive circuit tolerant of higher voltage signals
01/25/2000US6018256 Output circuit and electronic apparatus using the same
01/25/2000US6018254 Non-blocking delayed clocking system for domino logic
01/25/2000US6018252 Dual-power type integrated circuit
01/25/2000US6018251 Programmable integrated circuit having parallel routing conductors coupled to programming drivers in different locations
01/25/2000US6018250 Programming method to enable system recovery after power failure
01/20/2000WO2000003484A1 Low power line switching circuit, device and method
01/20/2000WO1999059088A3 A programmable logic device with macrocell controlled by a pla
01/19/2000EP0973262A2 Current mode logic circuit
01/19/2000EP0973261A2 Active pullup circuitry for open-drain signals
01/19/2000EP0973260A1 Low switching noise logic circuit
01/19/2000EP0972344A1 Fpga repeatable interconnect structure
01/19/2000EP0823148B1 Gtl output amplifier for coupling an input signal at the input to a transmission line at the output
01/19/2000CN1241782A Reduced voltage input/reduced voltage output tri-state buffers and methods therefor
01/19/2000CN1048596C Rectifying transfer gate circuit
01/18/2000US6016517 Data processing system and method for optimizing connector usage
01/18/2000US6016065 Charges recycling differential logic(CRDL) circuit and storage elements and devices using the same
01/18/2000US6016063 Method and apparatus for connecting long lines to form wide logic functions
01/18/2000CA2151658C Monolithically integrated vlsi optoelectronic circuits and a method of fabricating the same
01/18/2000CA2117936C Logic circuit having error detection function, redundant resource management method, and fault tolerant system using it
01/13/2000WO2000002313A1 A cmos driver
01/12/2000EP0971481A1 Supply and interface configurable input/output buffer
01/12/2000EP0775404B1 High-speed, differential line driver
01/11/2000US6014509 Field programmable gate array having access to orthogonal and diagonal adjacent neighboring cells
01/11/2000US6014334 Sample and load scheme for observability of internal nodes in a PLD
01/11/2000US6014303 Overcurrent preventing device
01/11/2000US6014046 Off chip driver (OCD) with variable drive capability for noise control
01/11/2000US6014044 Voltage comparator with floating gate MOS transistor
01/11/2000US6014039 CMOS high voltage drive output buffer
01/11/2000US6014038 Function block architecture for gate array
01/11/2000US6014037 Method and component arrangement for enhancing signal integrity
01/11/2000CA2169021C Integrated circuit having a conductance adjustable by means of a digital set point signal
01/05/2000EP0969633A2 Differential line driver
01/05/2000CN1048127C Architecture and interconnect scheme for programmable logic circuit