| Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996) |
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| 01/25/2001 | WO2001006657A1 Very fine grain field programmable gate array architecture and circuitry |
| 01/25/2001 | WO2001006656A1 High-performance clock-powered logic |
| 01/25/2001 | WO2001006655A1 Tristate circuit for power up conditions |
| 01/25/2001 | WO2001006651A2 Integrated semiconductor circuit |
| 01/25/2001 | WO2000052826A3 Interconnection and input/output resources for programmable logic integrated circuit devices |
| 01/25/2001 | DE19933799A1 Elektronische Schaltung, insbesondere für ein Mobilfunkgerät An electronic circuit, in particular for a mobile radio device |
| 01/25/2001 | DE10026158A1 Level converting circuit converts voltage from level shift unit, compared with reference voltage, into positive CMOS level |
| 01/24/2001 | EP1071215A1 Input stage with dynamic hysteresis |
| 01/24/2001 | EP1071211A1 Threshold voltage reduction of transistor shaped like a diode |
| 01/23/2001 | US6177862 High speed comparator |
| 01/23/2001 | US6177840 Circuit arrangement for amplifying a differential voltage signal which has a substantially temperature independent characteristic curve |
| 01/23/2001 | US6177831 Semiconductor integrated circuit with well potential control circuit |
| 01/23/2001 | US6177826 Silicon-on-insulator circuit having series connected PMOS transistors each having connected body and gate |
| 01/23/2001 | US6177824 Level shifting circuit |
| 01/23/2001 | US6177818 Complementary depletion switch body stack off-chip driver |
| 01/23/2001 | US6177817 Compensated-current mirror off-chip driver |
| 01/23/2001 | US6177816 Interface circuit and method of setting determination level therefor |
| 01/23/2001 | US6177811 Semiconductor integrated circuit device |
| 01/23/2001 | US6177810 Adjustable strength driver circuit and method of adjustment |
| 01/23/2001 | US6177809 Redundant input/output driver circuit |
| 01/18/2001 | WO2001005035A1 Fast reconfigurable programmable device |
| 01/18/2001 | DE19930182A1 Bipolar/CMOS signal conversion circuit |
| 01/18/2001 | DE10025241A1 Output buffer circuit configuration with CMOS-output stage, for integrated circuit applications, includes correction unit for adjusting the output signal if the signal rises to a high potential level |
| 01/17/2001 | EP1069739A2 Removal of a common mode voltage in a differential receiver |
| 01/17/2001 | EP1069687A2 Superconducting self-clocked complementary logic circuit |
| 01/17/2001 | EP1069685A1 Fast propagation technique in CMOS integrated circuits |
| 01/17/2001 | EP1068668A2 Circuit for processing data signals |
| 01/17/2001 | EP0799528B1 Negative feedback to reduce voltage oscillation in cmos output buffers |
| 01/16/2001 | US6175952 Technique of fabricating integrated circuits having interfaces compatible with different operating voltage conditions |
| 01/16/2001 | US6175951 Method for fabricating a customer-configured integrated circuit and customer-configured integrated circuit for exclusive use by a customer background of the invention |
| 01/16/2001 | US6175598 Output noise control scheme for multiple I/O's |
| 01/16/2001 | US6175481 Semiconductor device having a deactivation fuse |
| 01/16/2001 | US6175253 Fast bi-directional tristateable line driver |
| 01/16/2001 | US6175252 Driver circuit |
| 01/16/2001 | US6175251 Semiconductor integrated circuit device having power reduction |
| 01/16/2001 | US6175250 Output buffer circuit for driving a transmission line |
| 01/16/2001 | US6175249 High speed low skew CMOS to ECL converter |
| 01/16/2001 | US6175248 Pulse width distortion correction logic level converter |
| 01/16/2001 | US6175247 Context switchable field programmable gate array with public-private addressable sharing of intermediate data |
| 01/11/2001 | WO2001003301A1 High voltage protection circuit on standard cmos process |
| 01/11/2001 | WO2001003300A1 Method and circuitry for high speed buffering of clocks signals |
| 01/11/2001 | DE19930178C1 Integrated circuit-type signal level changing circuit especially based on ECL-CMOS elements |
| 01/11/2001 | CA2377896A1 High voltage protection circuit on standard cmos process |
| 01/10/2001 | EP1067692A1 Adiabatic logic circuit |
| 01/10/2001 | EP1067691A1 LVDS receiver using differential amplifiers |
| 01/10/2001 | EP1067660A2 Single gate oxide high to low level converter circuit with overvoltage protection |
| 01/10/2001 | CN1279536A Output buffer circuits |
| 01/09/2001 | US6173416 System and method for detecting errors using CPU signature |
| 01/09/2001 | US6172547 Semiconductor integrated circuit capable of driving large loads within its internal core area |
| 01/09/2001 | US6172545 Delay circuit on a semiconductor device |
| 01/09/2001 | US6172541 Driver circuit having load-independent slew rate |
| 01/09/2001 | US6172539 Synchronous buffer circuit and data transmission circuit having the synchronous buffer circuit |
| 01/09/2001 | US6172532 Gate circuit and semiconductor circuit to process low amplitude signals, memory, processor and information processing system manufactured by use of them |
| 01/09/2001 | US6172531 Low power wordline decoder circuit with minimized hold time |
| 01/09/2001 | US6172529 Compound domino logic circuit having output noise elimination |
| 01/09/2001 | US6172528 Charge sharing circuit for fanout buffer |
| 01/09/2001 | US6172527 Output circuit capable of reducing feedthrough current |
| 01/09/2001 | US6172526 Input/output interface including an output buffer circuit and depletion type field effect transistor |
| 01/09/2001 | US6172524 Data input buffer |
| 01/09/2001 | US6172523 Apparatus and method for converting a non-logic-family signal level to a logic-family signal level |
| 01/09/2001 | US6172522 Slew rate controlled predriver circuit |
| 01/09/2001 | US6172521 Programmable logic IC having memories for previously storing a plurality of configuration data and a method of reconfigurating same |
| 01/09/2001 | US6172519 Bus-hold circuit having a defined state during set-up of an in-system programmable device |
| 01/09/2001 | US6172518 Method of minimizing power use in programmable logic devices |
| 01/09/2001 | US6172517 Signal transmitting device, circuit block and integrated circuit suited to fast signal transmission |
| 01/09/2001 | US6172516 Output buffering apparatus and method |
| 01/09/2001 | US6172383 Power MOSFET having voltage-clamped gate |
| 01/04/2001 | WO2001001645A1 Circuit and method for galvanically separate broadband transmission |
| 01/04/2001 | WO2001001576A1 A low power multiplexer with shared, clocked transistor |
| 01/04/2001 | WO2001001575A1 System memory access system and method for reconfigurable chip |
| 01/04/2001 | WO2001001236A1 A multilevel logic field programmable device |
| 01/04/2001 | WO2001001216A1 System and method for independent power sequencing of integrated circuits |
| 01/03/2001 | EP1064767A1 High speed signaling for interfacing vlsi cmos circuits |
| 01/03/2001 | EP1064726A1 Circuit for reducing leaking current |
| 01/03/2001 | EP1020030A4 Programmable gate array |
| 01/02/2001 | US6170068 System and method for preserving the state of a device across a reset event |
| 01/02/2001 | US6170065 Automatic system for dynamic diagnosis and repair of computer configurations |
| 01/02/2001 | US6169687 High density and speed magneto-electronic memory for use in computing system |
| 01/02/2001 | US6169443 Transmission gate |
| 01/02/2001 | US6169424 Self-biasing sense amplifier |
| 01/02/2001 | US6169422 Apparatus and methods for high throughput self-timed domino circuits |
| 01/02/2001 | US6169421 Complementary metal-oxide semiconductor buffer |
| 01/02/2001 | US6169420 Output buffer |
| 01/02/2001 | US6169419 Method and apparatus for reducing standby leakage current using a transistor stack effect |
| 01/02/2001 | US6169418 Efficient routing from multiple sources to embedded DRAM and other large circuit blocks |
| 01/02/2001 | US6169417 Product-term macrocells for programmable logic device |
| 01/02/2001 | US6169416 Programming architecture for field programmable gate array |
| 12/30/2000 | CA2311100A1 Fast pre-amplifier for an interface arrangement |
| 12/28/2000 | WO2000079596A1 Cmos device with diodes connected between input node and gate electrodes |
| 12/28/2000 | WO2000079294A1 A method and apparatus for providing controllable compensation factors to a compensated driver circuit which may be used to perform testing of the structural integrity of the compensated driver circuit |
| 12/28/2000 | DE10024115A1 Eingangspuffer Input buffer |
| 12/27/2000 | EP1063774A1 High speed level shift circuit for low voltage output |
| 12/27/2000 | EP1063757A2 Power MOSFET having voltage-clamped gate |
| 12/27/2000 | EP1063529A1 Method and apparatus for testing field programmable gate arrays |
| 12/27/2000 | EP1062586A1 Circuit for powering down unused configuration bits to minimize power consumption |
| 12/26/2000 | US6167560 One-cold encoding method for low power operation in a complex programmable logic device |
| 12/26/2000 | US6167559 FPGA structure having main, column and sector clock lines |
| 12/26/2000 | US6167554 Combinational logic circuit, its design method and integrated circuit device |
| 12/26/2000 | US6167527 Clocking system for microcontrollers |
| 12/26/2000 | US6167321 Interface module with protection circuit and method of protecting an interface |