Patents
Sitemap › H03 - Basic electronic circuitry › H03K - Pulse technique › H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996)
12/1999
12/07/1999US5999015 Logic region resources for programmable logic devices
12/07/1999US5998842 Semiconductor device with gate and control electrodes that provide independent control of drain current
12/02/1999WO1999048260A8 High speed signaling for interfacing vlsi cmos circuits
12/01/1999EP0961410A2 An integrated circuit device
12/01/1999EP0961409A1 Compensations of timing errors caused by dynamic thermal mismatches
12/01/1999EP0961290A2 Flash memory with improved erasability and its circuitry
12/01/1999EP0961289A2 Flash memory with improved erasability and its circuitry
12/01/1999EP0961206A2 High voltage tolerant and compliant driver circuit
12/01/1999EP0960478A1 High-voltage cmos level shifter
12/01/1999EP0960477A1 Output driver circuit with jump start for current sink on demand
12/01/1999EP0960476A1 Input buffer circuit
12/01/1999EP0960374A2 Internal bus system for dfps, building blocks with two dimensional or multidimensional programmable cell structures to handle large amounts of data involving high networking requirements
12/01/1999CN1237297A Device for generating plurality of code series simultaneously and CDMA radio receiver comprising the device
12/01/1999CN1237040A Logic circuit having reduced power consumption
11/1999
11/30/1999US5996039 Apparatus and method for implementing a tri-state signal driver
11/30/1999US5995988 Configurable parallel and bit serial load apparatus
11/30/1999US5995578 Windowed clock generation
11/30/1999US5995420 Integrated XNOR flip-flop for cache tag comparison
11/30/1999US5994946 Alternating inverters for capacitive coupling reduction in transmission lines
11/30/1999US5994945 Circuit for compensating for variations in both temperature and supply voltage
11/30/1999US5994944 Level converting circuit having a high switching speed
11/30/1999US5994943 Data output circuits having enhanced ESD resistance and related methods
11/30/1999US5994942 Buffer circuit with wide dynamic range
11/30/1999US5994925 Pseudo-differential logic receiver
11/30/1999US5994923 Correctable output driver and method of using the same
11/30/1999US5994922 Output buffer, semiconductor integrated circuit having output buffer and driving ability adjusting method for output buffer
11/30/1999US5994921 Universal sender device
11/30/1999US5994919 Method and apparatus for reducing ringing of a digital signal delivered over a transmission line
11/30/1999CA2008749C Noise rejecting ttl to cmos input buffer
11/24/1999EP0959564A1 Linearly-controlled resistive element apparatus
11/23/1999US5991910 Microcontroller having special mode enable detection circuitry and a method of operation therefore
11/23/1999US5991789 Circuit arrangement for realizing logic elements that can be represented by threshold value equations
11/23/1999US5990811 Transfer clock converter for digital data
11/23/1999US5990716 Method and system for recovering digital data from a transmitted balanced signal
11/23/1999US5990709 Circuit for comparing two electrical quantities provided by a first neuron MOS field effect transistor and a reference source
11/23/1999US5990706 Logic circuit and method of designing the same
11/23/1999US5990705 CMOS I/O circuit with high-voltage input tolerance
11/23/1999US5990704 Internal drive circuit providing third input pin state
11/23/1999US5990702 Flexible direct connections between input/output blocks (IOBs) and variable grain blocks (VGBs) in FPGA integrated circuits
11/23/1999US5990700 Input buffer circuit and method
11/23/1999US5988819 Single output transistor output stage for interface applications
11/18/1999WO1999059088A2 A programmable logic device with macrocell controlled by a pla
11/18/1999WO1999059057A1 Method and apparatus for fast production programming and low-voltage in-system writes for programmable logic device
11/17/1999EP0956646A1 Field programmable processor arrays
11/17/1999EP0956645A1 Field programmable processor
11/17/1999CN1235423A Semiconductor integrated circuit having sleep mode with low power and small area
11/17/1999CN1235422A Low dissipation inverter circuit
11/17/1999CN1235421A Noise protection circuits
11/16/1999US5986867 Protection circuit for output drivers
11/16/1999US5986492 Delay element for integrated circuits
11/16/1999US5986489 Slew rate control circuit for an integrated circuit
11/16/1999US5986487 Charge-pump circuit intended for use in a frequency control loop of a frequency synthesizer
11/16/1999US5986480 Multiple input zero power AND/NOR gate for use in a field programmable gate array (FPGA)
11/16/1999US5986478 Logical circuit capable of uniformizing output delays for different inputs
11/16/1999US5986476 Method and apparatus for implementing a dynamic adiabatic logic family
11/16/1999US5986475 Apparatus and method for resetting a dynamic logic circuit
11/16/1999US5986473 Differential, mixed swing, tristate driver circuit for high performance and low power on-chip interconnects
11/16/1999US5986472 Voltage level translation for an output driver system with a bias generator
11/16/1999US5986471 Bi-directional buffers and supplemental logic and interconnect cells for programmable logic devices
11/16/1999US5986470 Programmable logic array integrated circuit devices
11/16/1999US5986469 Programmable integrated circuit having L-shaped programming power buses that extend along sides of the integrated circuit
11/16/1999US5986468 Programmable application specific integrated circuit and logic cell therefor
11/16/1999US5986467 Time-multiplexed programmable logic devices
11/16/1999US5986466 Programmable gate array
11/16/1999US5986465 Programmable logic integrated circuit architecture incorporating a global shareable expander
11/16/1999US5986464 Threshold logic circuit with low space requirement
11/16/1999US5986463 Differential signal generating circuit having current spike suppressing circuit
11/16/1999US5986443 Low power required input buffer
11/11/1999WO1999057813A1 Circuit with individual electron components and method for the operation thereof
11/11/1999WO1999044120A3 METHOD FOR CONFIGURING DATA FLOW PROCESSORS AND MODULES WITH A TWO- OR MULTIDIMENSIONAL PROGRAMMABLE CELL STRUCTURE (FPGAs, DPGAs OR SIMILAR) WITHOUT PRODUCING DEADLOCKS
11/11/1999WO1999018667A3 Programmable gate array
11/11/1999DE19820248A1 Output buffer circuit for controlling symmetrical transmission line e.g. for high-speed data transmission
11/10/1999EP0955594A2 Arithmetic circuit with two different voltage levels
11/10/1999EP0954906A1 Latch circuit
11/10/1999EP0954904A1 Zero-delay slew-rate controlled output buffer
11/10/1999EP0855104A4 Gatable level-pulling circuit
11/10/1999EP0733285B1 Combined programmable logic array and array logic
11/10/1999CN1234923A Reconfigurable computing system
11/10/1999CN1234652A Decoding method of memory area wordline decoder, and circuit thereof
11/09/1999US5983013 Method for generating non-blocking delayed clocking signals for domino logic
11/09/1999US5982227 CMOS current source circuit
11/09/1999US5982218 Input circuit provided in a semiconductor integrated circuit, used in high-speed small-amplitude signal transmission system
11/09/1999US5982207 Integrated circuit output buffer with reduced voltage output swing
11/09/1999US5982199 Faster NAND for microprocessors utilizing unevenly sub-nominal P-channel and N-channel CMOS transistors with reduced overlap capacitance
11/09/1999US5982198 Free inverter circuit
11/09/1999US5982197 Dynamic circuit
11/09/1999US5982196 Programmable logic device producing a complementary bit line signal
11/09/1999US5982195 Programmable logic device architectures
11/09/1999US5982193 Input/output block (IOB) connections to MaxL lines, nor lines and dendrites in FPGA integrated circuits
11/09/1999US5982191 Broadly distributed termination for buses using switched terminator logic
11/09/1999US5982162 Internal voltage generation circuit that down-converts external power supply voltage and semiconductor device generating internal power supply voltage on the basis of reference voltage
11/09/1999CA2202123C Bi-directional voltage translator
11/04/1999WO1999056394A1 Dedicated interface architecture for a hybrid integrated circuit
11/04/1999DE19919140A1 Low voltage differential signal driver with pre-amplifier circuit
11/04/1999DE19849560A1 Output buffer circuit for controlling signal rise rate
11/04/1999DE19833068A1 Decoder output stage e.g. for integrated semiconductor chip
11/03/1999EP0954102A1 Exclusive or/nor circuits
11/03/1999EP0954101A2 Hybrid data and clock precharging techniques in domino logic circuits minimizes charge sharing during evaluation
11/03/1999EP0954100A1 Cmos high voltage drive output buffer
11/03/1999CN1233886A Device with clock output circuit
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