| Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996) |
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| 01/04/2000 | US6012079 Conditional sum adder using pass-transistor logic and integrated circuit having the same |
| 01/04/2000 | US6011750 Semiconductor device having address transition detecting circuit |
| 01/04/2000 | US6011744 Programmable logic device with multi-port memory |
| 01/04/2000 | US6011740 Structure and method for providing additional configuration memories on an FPGA |
| 01/04/2000 | US6011730 Programmable logic device with multi-port memory |
| 01/04/2000 | US6011425 CMOS offset trimming circuit and offset generation circuit |
| 01/04/2000 | US6011423 Virtual voltage power supply |
| 01/04/2000 | US6011421 Scalable level shifter for use in semiconductor memory device |
| 01/04/2000 | US6011411 CMOS logic circuit with reduced circuit area |
| 01/04/2000 | US6011410 Method of charging a dynamic node |
| 01/04/2000 | US6011409 Input/output buffer capable of accepting an input logic signal higher in voltage level than the system voltage |
| 01/04/2000 | US6011408 Programmable integrated circuit having a routing conductor that is driven with programming current from two different programming voltage terminals |
| 01/04/2000 | US6011407 Field programmable gate array with dedicated computer bus interface and method for configuring both |
| 01/04/2000 | US6011406 Ultra-fast configuration mode for a programmable logic device |
| 12/30/1999 | DE19927094A1 Sampling flip-flop for testing digital logic at end of production line |
| 12/29/1999 | WO1999067824A1 Efficient routing from multiple sources to embedded dram and other large circuit blocks |
| 12/29/1999 | WO1999067717A1 Interface module with protection circuit and method of protecting an interface |
| 12/29/1999 | EP0967723A2 Programmable pin designation for semiconductor devices |
| 12/29/1999 | EP0966792A1 A driver circuit for low voltage operation of a successive approximation register (sar) analog to digital (a/d) converter and method therefor |
| 12/29/1999 | EP0916187A4 Voltage controlled variable current reference |
| 12/29/1999 | CN1047866C Self-bootstrapping device |
| 12/28/1999 | US6009253 Spare repeater amplifiers for long lines on complex integrated circuits |
| 12/28/1999 | US6009021 MOS logic circuit with hold operation |
| 12/28/1999 | US6008695 Input amplifier for input signals with steep edges |
| 12/28/1999 | US6008684 CMOS output buffer with CMOS-controlled lateral SCR devices |
| 12/28/1999 | US6008670 Differential CMOS logic family |
| 12/28/1999 | US6008668 Semiconductor device and input and output circuits thereof |
| 12/28/1999 | US6008667 Emitter-coupled logic to CMOS logic converter and method of operation |
| 12/28/1999 | US6008666 Variable-delay interconnect structure for a programmable logic device |
| 12/23/1999 | WO1999066640A1 Semiconductor integrated circuit |
| 12/23/1999 | WO1999066639A1 Current-controlled output buffer |
| 12/23/1999 | WO1999066336A1 Adaptive driver with capacitive load sensing and method of operation |
| 12/22/1999 | CN1239355A 半导体集成电路装置 The semiconductor integrated circuit device |
| 12/22/1999 | CN1047702C Control circuit system for control of parameters in logic circuits or similar |
| 12/21/1999 | US6005821 Circuit and method for instruction controllable slew rate of bit line driver |
| 12/21/1999 | US6005806 Nonvolatile configuration cells and cell arrays |
| 12/21/1999 | US6005432 Voltage level shift system and method |
| 12/21/1999 | US6005422 Semiconductor integrated circuit and consumed power reducing method |
| 12/21/1999 | US6005418 Low power consuming logic circuit |
| 12/21/1999 | US6005417 Method and apparatus for reducing power consumption in a domino logic by reducing unnecessary toggles |
| 12/21/1999 | US6005416 Compiled self-resetting CMOS logic array macros |
| 12/21/1999 | US6005414 Mixed-mode multi-protocol serial interface driver |
| 12/21/1999 | US6005413 5V tolerant PCI I/O buffer on 2.5V technology |
| 12/21/1999 | US6005412 AGP/DDR interfaces for full swing and reduced swing (SSTL) signals on an integrated circuit chip |
| 12/21/1999 | US6005411 Monolithically integrated programmable device having elementary modules connected electrically by means of memory cells of the flash type |
| 12/21/1999 | US6005410 Interconnect structure between heterogeneous core regions in a programmable array |
| 12/21/1999 | US6005408 System for compensating for temperature induced delay variation in an integrated circuit |
| 12/21/1999 | CA2134256C Apparatus and method for referencing an optical receiver |
| 12/16/1999 | WO1999065145A1 Threshold operation circuit and gate circuit using it, self-holding circuit and start signal generation circuit |
| 12/16/1999 | WO1999065130A1 A stress-follower circuit configuration |
| 12/16/1999 | DE19925374A1 Circuit for setting digital potential at digital IC output or bi-directional input/output pin |
| 12/16/1999 | DE19855602A1 Buffer circuit for digital data using dynamic threshold voltage MOS transistor |
| 12/16/1999 | DE19849949A1 Integrated circuit with switching to standby mode for mobile telephone |
| 12/16/1999 | DE19844674A1 Logic level converter for level shifter |
| 12/15/1999 | EP0964539A2 Receiver capable of outputting a high quality signal without regard to an input signal level |
| 12/15/1999 | EP0964521A2 Logic module with configurable combinational and sequential blocks |
| 12/15/1999 | EP0964520A1 Integrated circuit with off chip drivers |
| 12/15/1999 | EP0964519A2 Semiconductor integrated logic circuit with sequential circuits capable of preventing sub-threshold leakage current |
| 12/15/1999 | CN1238599A Integrated circuit device |
| 12/15/1999 | CN1238531A Integrated circuit with improved off chip drivers |
| 12/15/1999 | CN1238530A Input receiver circuit |
| 12/14/1999 | US6002292 Method and apparatus to control noise in a dynamic circuit |
| 12/14/1999 | US6002290 Crisscross voltage level shifter |
| 12/14/1999 | US6002288 Current limiting circuit and method that may be shared among different circuitry |
| 12/14/1999 | US6002276 Stable output bias current circuitry and method for low-impedance CMOS output stage |
| 12/14/1999 | US6002272 Tri-rail domino circuit |
| 12/14/1999 | US6002271 Dynamic MOS logic circuit without charge sharing noise |
| 12/14/1999 | US6002270 Synchronous differential logic system for hyperfrequency operation |
| 12/14/1999 | US6002269 TTL logic driver circuit |
| 12/14/1999 | US6002268 FPGA with conductors segmented by active repeaters |
| 12/09/1999 | WO1999063669A1 Multiple-valued logic circuit architecture: supplementary symmetrical logic circuit structure (sus-loc) |
| 12/09/1999 | WO1999063668A1 Logic gate |
| 12/09/1999 | WO1999063667A1 Digital cmos output buffer having separately gated pull-up and pull-down devices |
| 12/09/1999 | DE19825258A1 Output buffer circuit for digital signal transmission via transmission line |
| 12/09/1999 | DE19825216A1 Inverter circuit using controlled transistor |
| 12/09/1999 | DE19824154A1 Protection circuit for personal computers of data processing equipment |
| 12/08/1999 | EP0963083A2 Method of and apparatus for correctly transmitting signals at high speed without waveform distortion |
| 12/08/1999 | EP0963070A1 Device for generating a plurality of code series simultaneously and cdma radio receiver comprising the device |
| 12/08/1999 | EP0963044A2 Slew rate output circuit with capability of driving an output MOS field effect transistor |
| 12/08/1999 | EP0962869A1 Dual-standard interface circuit for serial link |
| 12/08/1999 | EP0962051A1 Method of biasing an mos ic to operate at the zero temperature coefficient point |
| 12/08/1999 | EP0961980A2 Method for self-synchronization of configurable elements of a programmable component |
| 12/08/1999 | EP0544917B1 Capacitive load driving circuit |
| 12/08/1999 | CN1047262C Semiconductor device capable of reducing power dissipation in stand-by state |
| 12/07/1999 | US5999483 Semiconductor circuit device operating in synchronization with clock signal |
| 12/07/1999 | US5999390 Input buffer circuit for semiconductor device |
| 12/07/1999 | US5999086 Circuit arrangement with combinatorial blocks arranged between registers |
| 12/07/1999 | US5999038 Fuse circuit having zero power draw for partially blown condition |
| 12/07/1999 | US5999036 Output circuit with output voltage controlled by current flow through an output transistor circuit |
| 12/07/1999 | US5999033 Low-to-high voltage CMOS driver circuit for driving capacitive loads |
| 12/07/1999 | US5999031 Semiconductor device with bus line loading compensation circuit |
| 12/07/1999 | US5999028 Differential circuits with adjustable propagation timing |
| 12/07/1999 | US5999027 Phase compensating apparatus and delay controlling circuit |
| 12/07/1999 | US5999022 Signal transmission driver circuit, receiver circuit, and method thereof for transmitting and receiving information based on multiple periods and/or a delay function |
| 12/07/1999 | US5999021 Pad signal detecting circuit in a semiconductor device for detecting a reference voltage in a high-speed interface |
| 12/07/1999 | US5999020 High-speed, differential pair input buffer |
| 12/07/1999 | US5999019 Fast CMOS logic circuit with critical voltage transition logic |
| 12/07/1999 | US5999018 Programmable buffer circuit comprising reduced number of transistors |
| 12/07/1999 | US5999017 CMOS implemented output buffer circuit for providing ECL level signals |
| 12/07/1999 | US5999016 Architectures for programmable logic devices |