Patents
Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996)
05/2000
05/02/2000US6057703 Reconfigurable programmable logic devices
05/02/2000US6057702 Bus driver
04/2000
04/27/2000WO2000024127A1 A voltage translator circuit which allows for variable low voltage signal translation
04/27/2000DE19938907A1 Output buffer has MOS transistor with low potential node connected to control node of pull-up transistor and high potential nodes connected to low potential node of another transistor and high potential supply line
04/26/2000EP0996229A2 Electronic circuit device having a recirculating memory buffer (FIFO)
04/25/2000US6055180 Electrically addressable passive device, method for electrical addressing of the same and uses of the device and the method
04/25/2000US6054888 Level shifter with protective limit of voltage across terminals of devices within the level shifter
04/25/2000US6054876 Buffer circuit
04/25/2000US6054875 Output buffer for a mixed voltage environment
04/25/2000US6054874 Output driver circuit with switched current source
04/25/2000US6054873 Interconnect structure between heterogeneous core regions in a programmable array
04/25/2000US6054872 Semiconductor integrated circuit with mixed gate array and standard cell
04/25/2000CA2004778C Semiconductor integrated circuit
04/20/2000WO2000022711A1 Fault tolerant bus for clustered system
04/20/2000DE19846454A1 Elektronische Schaltungsanordnung Electronic circuitry
04/20/2000CA2346373A1 Fault tolerant bus for clustered system
04/19/2000EP0994566A1 Threshold operation circuit and gate circuit using it, self-holding circuit and start signal generation circuit
04/19/2000EP0994564A1 Inverter circuit with duty cycle control
04/18/2000US6052770 Asynchronous register
04/18/2000US6052317 Output circuit of semiconductor memory device
04/18/2000US6052309 Nonvolatile configuration cells and cell arrays
04/18/2000US6052018 Small amplitude signal output circuit
04/18/2000US6052008 Generation of true and complement signals in dynamic circuits
04/18/2000US6051995 Constant impedance, low noise CMOS buffer
04/18/2000US6051994 Variable voltage driver
04/18/2000US6051993 Level shift circuit compensating for circuit element characteristic variations
04/18/2000US6051992 Configurable logic element with ability to evaluate five and six input functions
04/18/2000US6051991 Architecture and interconnect scheme for programmable logic circuits
04/18/2000US6051989 Active termination of a conductor for bi-directional signal transmission
04/18/2000CA2162312C System for, and method of, minimizing noise in an integrated circuit chip
04/12/2000CN1250175A Interface circuit and input buffer integrated circuit containing the same interface circuit
04/11/2000US6049893 System and method for synchronously resetting a plurality of microprocessors
04/11/2000US6049504 Pulse driver
04/11/2000US6049245 Power reduction circuit
04/11/2000US6049242 Voltage reference source for an overvoltage-tolerant bus interface
04/11/2000US6049232 Semiconductor integrated circuit
04/11/2000US6049230 Silicon on insulator domino logic circuits
04/11/2000US6049229 Self-biasing CMOS PECL receiver with wide common-mode range and multi-level-transmit to binary decoder
04/11/2000US6049228 Level shifter for a liquid crystal display
04/11/2000US6049227 FPGA with a plurality of I/O voltage levels
04/11/2000US6049225 Input/output interface circuitry for programmable logic array integrated circuit devices
04/11/2000US6049224 Programmable logic device with logic cells having a flexible input structure
04/11/2000US6049223 Programmable logic array integrated circuit with general-purpose memory configurable as a random access or FIFO memory
04/11/2000US6049221 Semiconductor integrated circuit system having function of automatically adjusting output resistance value
04/06/2000WO2000019608A2 Circuit for processing data signals
04/06/2000WO2000019436A1 Decoder element for producing an output signal with three different potentials and operating method for said decoder element
04/06/2000WO2000019435A1 Decoder element for producing an output signal with three different potentials
04/06/2000WO2000019384A1 Circuit and method for authenticating the content of a memory location
04/06/2000WO2000019313A2 Method for executing individual algorithms by means of a reconfigurable circuit and device for carrying out such a method
04/05/2000EP0991191A2 System and method for reducing power dissipation in a circuit
04/05/2000EP0990235A2 Electrically addressable passive device, method for electrical addressing of the same and uses of the device and the method
04/04/2000US6047394 Circuit for easily testing a logic circuit having a number of input-output pins by scan path
04/04/2000US6047392 System and method for tracking dirty memory
04/04/2000US6046931 Method and apparatus for a RAM circuit having N-nary output interface
04/04/2000US6046627 Semiconductor device capable of operating stably with reduced power consumption
04/04/2000US6046626 Voltage transfer circuit and a booster circuit, and an IC card comprising the same
04/04/2000US6046611 Semiconductor circuit device with receiver circuit
04/04/2000US6046608 Differential precharge circuit
04/04/2000US6046607 Logic circuit controlled by a plurality of clock signals
04/04/2000US6046606 Soft error protected dynamic circuit
04/04/2000US6046605 Bidirectional asynchronous open collector buffer
04/04/2000US6046604 Semiconductor integrated circuit device having power reduction mechanism
04/04/2000US6046603 Method and apparatus for controlling the partial reconfiguration of a field programmable gate array
04/04/2000CA2169026C Integrated circuit input-output coupler
03/2000
03/30/2000WO2000018011A1 Input circuit for an output stage
03/30/2000WO2000017902A1 Fuse circuit having zero power draw for partially blown condition
03/30/2000WO2000017772A2 Configurable hardware block
03/30/2000DE19844728C1 Decoderelement zur Erzeugung eines Ausgangssignals mit drei unterschiedlichen Potentialen Decoder element for generating an output signal with three different potentials
03/30/2000DE19844666C1 Decoderelement zur Erzeugung eines Ausgangssignals mit drei unterschiedlichen Potentialen und Betriebsverfahren für das Decoderelement Decoder element for generating an output signal with three different potentials and operating procedures for the decoder element
03/30/2000DE19843663A1 Konfigurierbarer Hardware-Block Configurable hardware block as
03/30/2000CA2316977A1 Fuse circuit having zero power draw for partially blown condition
03/29/2000EP0989674A1 Integrated circuit
03/29/2000EP0989673A2 Low power digital input circuit
03/29/2000CN1249043A Multi-functional arithmetic with multi value-states
03/28/2000US6044214 Fault simulation method operable at a high speed
03/28/2000US6044031 Programmable bit line drive modes for memory arrays
03/28/2000US6043970 High voltage driving circuit reducing a transient current
03/28/2000US6043702 Dynamic biasing for overshoot and undershoot protection circuits
03/28/2000US6043699 Level shift circuit
03/28/2000US6043698 Voltage level shifter
03/28/2000US6043697 Clock signal control apparatus for data output buffer
03/28/2000US6043689 Driver circuit for providing reduced AC defects
03/28/2000US6043686 Apparatus and method for transistor element reduction in circuits comparing serial data signals
03/28/2000US6043684 Method and apparatus for reducing skew between input signals and clock signals within an integrated circuit
03/28/2000US6043683 Output pad circuit using control signal
03/28/2000US6043682 Predriver logic circuit
03/28/2000US6043681 CMOS I/O circuit with high-voltage input tolerance
03/28/2000US6043680 5V tolerant I/O buffer
03/28/2000US6043679 Level shifter
03/28/2000US6043678 Input circuit
03/28/2000US6043677 Programmable clock manager for a programmable logic device that can implement delay-locked loop functions
03/28/2000US6043676 Wide exclusive or and wide-input and for PLDS
03/28/2000US6043675 Logic circuit utilizing capacitive coupling, an AD converter and a DA converter
03/28/2000US6043674 Null convention logic gates with flash, set and reset capability
03/28/2000US6043501 Continuous input cell for data acquisition circuits
03/28/2000CA2188128C Impedance emulator
03/23/2000WO2000016483A1 A method and apparatus for reducing standby leakage current using a transistor stack effect
03/22/2000CN1248098A Film semiconductor integrated circuit
03/21/2000US6041428 Connection matrix for a microcontroller emulation chip
03/21/2000US6040737 Output buffer circuit and method that compensate for operating conditions and manufacturing processes