| Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143) |
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| 06/21/2001 | WO2001045154A1 Method for a tungsten silicide etch |
| 06/21/2001 | WO2001045148A1 Method of achieving higher inversion layer mobility in silicon carbide semiconductor devices |
| 06/21/2001 | WO2001045147A1 Method of manufacturing a transistor |
| 06/21/2001 | WO2001045146A1 Superior silicon carbide integrated circuits and method of fabricating |
| 06/21/2001 | WO2001045142A2 Lateral insulated-gate bipolar transistor (ligbt) device in silicon-on-insulator (soi) technology |
| 06/21/2001 | WO2001045113A1 Method to provide a reduced constant e-field during erase of eeproms for reliability improvement |
| 06/21/2001 | WO2001044867A1 Method of manufacturing an active matrix device |
| 06/21/2001 | WO2001044823A1 Micromechanical spring structure, especially for a rotational speed sensor |
| 06/21/2001 | WO2001044822A1 Different sacrificial layer thickness under fixed and movable electrodes (capacitive acceleration sensor) |
| 06/21/2001 | WO1998005807A8 CaTiO3 INTERFACIAL TEMPLATE STRUCTURE ON SUPERCONDUCTOR |
| 06/21/2001 | US20010004544 Dividing wafer, treating perimeter edges to remove a substantial portion of remaining substrate material layer or scribe therefrom without exposing active circuitry of die |
| 06/21/2001 | US20010004542 Method of manufacturing a semiconductor device |
| 06/21/2001 | US20010004541 Forming mask layer on surface of semiconductor substrate, selectively removing region of mask layer forming gate region, forming implantation mask layer on surface of mask layer in region including gate, forming anti-punch-through region |
| 06/21/2001 | US20010004537 Method for fabricating thin film transistors |
| 06/21/2001 | US20010004535 Forming gate electrode on substrate, forming first insulating layer and semiconductor layer over gate electrode, coating semiconductor layer with photoresist, exposing and developing photoresist to form pattern, etching |
| 06/21/2001 | US20010004332 NROM cell with improved programming, erasing and cycling |
| 06/21/2001 | US20010004330 Non-volatile semiconductor memory device and manufacturing method thereof |
| 06/21/2001 | US20010004325 Nonvolatile memory cell and method for programming and/or verifying the same |
| 06/21/2001 | US20010004128 Semiconductor package and manufacturing method thereof |
| 06/21/2001 | US20010004124 High-voltage semiconductor device |
| 06/21/2001 | US20010004122 Semiconductor device having dummy gates and its manufacturing method |
| 06/21/2001 | US20010004121 Semiconductor device and method of manufacturing the same |
| 06/21/2001 | US20010004120 Non-volatile memory cells, high voltage transistors and logic transistors integrated on a single chip |
| 06/21/2001 | US20010004119 Non-volatile memory device and manufacturing process thereof |
| 06/21/2001 | US20010004085 Method for hermetically encapsulating microsystems in situ |
| 06/21/2001 | DE19961299A1 Knock detector for internal combustion engine has surface micromechanical acceleration sensor element with two capacitors, where capacitance variation can be used to detect knocking |
| 06/21/2001 | DE19961297A1 Wiring arrangement to prevent polarity reversion of DMOS transistor; has charge carrier area comprising individual spaced part-charge carrier areas which are electrically connected together |
| 06/21/2001 | DE19960604A1 Mikromechanische Federstruktur, insbesondere für einen Drehratensensor Micromechanical spring structure, especially for a yaw rate sensor |
| 06/21/2001 | DE19958234A1 Configuration for electric isolation of two active cells in semiconductor body |
| 06/21/2001 | DE19954344A1 MOS transistor for driver circuit |
| 06/21/2001 | DE10060506A1 Semiconductor component used as a rectifier comprises a semiconductor chip, an anode, a cathode, a first layer section, a second layer section and a third layer section arranged parallel to each other; a cathode layer and a drift layer |
| 06/21/2001 | CA2393443A1 Mosfet device system and method |
| 06/20/2001 | EP1109226A2 Semiconductor device and its manufacturing method capable of reducing low frequency noise |
| 06/20/2001 | EP1109209A1 Process for fabricating monocrystalline silicon nanometric lines and resulting device |
| 06/20/2001 | EP1108677A1 Method of hermetic In Situ encapsulation of microsystems |
| 06/20/2001 | EP1108203A2 Micromechanical component protected against environmental influences |
| 06/20/2001 | EP1108163A2 Control device in a motor vehicle |
| 06/20/2001 | EP0673548B1 Bipolar transistor |
| 06/20/2001 | EP0616723B1 Process for fabricating layered superlattice materials |
| 06/20/2001 | CN1300444A Flash memory cell with self-aligned gates and fabrication process |
| 06/20/2001 | CN1300103A Semiconductor device, liquid crystal display device and mfg. method thereof |
| 06/20/2001 | CN1300102A SOI semiconductor integrated circuit for eliminating floater effect and mfg. method thereof |
| 06/20/2001 | CN1300098A Deep turf mask capable of intensifying performance and reliability of buried channel P field effect transistor |
| 06/20/2001 | CN1299983A Semiconducter device with conductive layer and liquid crystal display device and production method thereof |
| 06/20/2001 | CN1067489C Ge-Si anode insulation grid heterojunction transistor |
| 06/19/2001 | US6249618 Circuit architecture and method for switching sensor resolution |
| 06/19/2001 | US6249472 Semiconductor memory device with antifuse |
| 06/19/2001 | US6249333 Liquid crystal display panel |
| 06/19/2001 | US6249330 Display device and manufacturing method |
| 06/19/2001 | US6249326 Active matrix type LCD in which a pixel electrodes width along a scanning line is three times its data line side width |
| 06/19/2001 | US6249029 Device method for enhanced avalanche SOI CMOS |
| 06/19/2001 | US6249028 Operable floating gate contact for SOI with high Vt well |
| 06/19/2001 | US6249027 Partially depleted SOI device having a dedicated single body bias means |
| 06/19/2001 | US6249026 MOS Transistor with a buried oxide film containing fluorine |
| 06/19/2001 | US6249023 Gated semiconductor device |
| 06/19/2001 | US6249022 Trench flash memory with nitride spacers for electron trapping |
| 06/19/2001 | US6249021 Nonvolatile semiconductor memory device and method of manufacturing the same |
| 06/19/2001 | US6249020 DEAPROM and transistor with gallium nitride or gallium aluminum nitride gate |
| 06/19/2001 | US6249011 Thin film transistor array with light shield layer |
| 06/19/2001 | US6248675 Fabrication of field effect transistors having dual gates with gate dielectrics of high dielectric constant using lowered temperatures |
| 06/19/2001 | US6248673 Hydrogen thermal annealing method for stabilizing microelectronic devices |
| 06/19/2001 | US6248666 Process of manufacturing a semiconductor device including a buried channel field effect transistor |
| 06/19/2001 | US6248664 Forming active layer and oxide layer on backing for semiconductors |
| 06/19/2001 | US6248657 Semiconductor device and method for manufacturing the same |
| 06/19/2001 | US6248653 Method of manufacturing gate structure |
| 06/19/2001 | US6248652 Method of manufacture of a semiconductor device |
| 06/19/2001 | US6248645 Semiconductor device having buried-type element isolation structure and method of manufacturing the same |
| 06/19/2001 | US6248639 Electrostatic discharge protection circuit and transistor |
| 06/19/2001 | US6248638 Enhancements to polysilicon gate |
| 06/19/2001 | US6248637 Process for manufacturing MOS Transistors having elevated source and drain regions |
| 06/19/2001 | US6248634 Field-effect transistor and fabrication method thereof and image display apparatus |
| 06/19/2001 | US6248632 Method of forming gate electrode with polycide structure in semiconductor device |
| 06/19/2001 | US6248628 Method of fabricating an ONO dielectric by nitridation for MNOS memory cells |
| 06/19/2001 | US6248626 Floating back gate electrically erasable programmable read-only memory (EEPROM) |
| 06/19/2001 | US6248621 Method of growing high-quality crystalline silicon quantum wells for RTD structures |
| 06/19/2001 | US6248620 Method for fabricating a field effect-controlled semiconductor component |
| 06/19/2001 | US6248606 Method of manufacturing semiconductor chips for display |
| 06/19/2001 | US6248529 Method of chemically assembling nano-scale devices |
| 06/19/2001 | US6248508 Manufacturing a circuit element |
| 06/14/2001 | WO2001043201A1 Semiconductor device with a diode, and method of manufacturing such a device |
| 06/14/2001 | WO2001043200A1 Controllable semiconductor switching element that blocks in both directions |
| 06/14/2001 | WO2001043198A2 Source/drain-on-insulator (s/doi) field effect transistor using silicon nitride and silicon oxide and method of fabrication |
| 06/14/2001 | WO2001043197A2 Source/drain-on-insulator (s/doi) field effect transistors and method of fabrication |
| 06/14/2001 | WO2001043196A1 Method for forming ordered structure of fine metal particles |
| 06/14/2001 | WO2001043187A2 Removal of silicon oxynitride material using a wet chemical process after gate etch processing |
| 06/14/2001 | WO2001043186A1 Body contacted silicon-on-insulator (soi) structure and method of fabrication |
| 06/14/2001 | WO2001043180A1 Thin film transistor and method of manufacturing the same |
| 06/14/2001 | WO2001043177A1 Method for establishing ultra-thin gate insulator using anneal in ammonia |
| 06/14/2001 | WO2001043174A2 Fabrication of gallium nitride layers on textured silicon substrates |
| 06/14/2001 | WO2001043172A1 Passivated silicon carbide devices with low leakage current and method of fabricating |
| 06/14/2001 | WO2001043165A2 Oxide films containing p-type dopant and process for preparing same |
| 06/14/2001 | WO2001042797A1 Micromechanical structure, in particular for an acceleration sensor |
| 06/14/2001 | WO2001042529A1 METHOD FOR FORMING TiSiN FILM, DIFFUSION PREVENTIVE FILM COMPRISING TiSiN FILM, SEMICONDUCTOR DEVICE AND ITS PRODUCTION METHOD, AND APPARATUS FOR FORMING TiSiN FILM |
| 06/14/2001 | WO2000070684A3 Silicon carbide power devices comprising charge coupling regions |
| 06/14/2001 | WO2000051167A9 Monolithically integrated trench mosfet and schottky diode |
| 06/14/2001 | US20010003667 Forming a polysilicon structure on a layer of the transistor; and substituting metal for at least a portion of the polysilicon structure |
| 06/14/2001 | US20010003666 By using a combination of arsenic and phosphorus to tailor the lateral profile to meet both series resistance and channel hot carrier requirements; relatively higher dose of arsenic |
| 06/14/2001 | US20010003659 Method of manufacturing a semiconductor device |
| 06/14/2001 | US20010003658 Leaving the photoresist layer on the gate electrode after patterning it, then heating to reflow the photoresist to cover the side edges of the gate electrode; three-layer thin film is used as source, drain and pixel electrodes |
| 06/14/2001 | US20010003657 Method for manufacturing a thin-film transistor |