Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
06/1987
06/10/1987EP0225111A2 Wafer boat manufacture and product
06/10/1987EP0224985A2 Composite optical membrane including anti-reflective coating
06/10/1987EP0224968A2 Dielectric passivation
06/10/1987EP0224887A1 Gate array arrangement using the CMOS technique
06/10/1987EP0224857A1 Junction shortening-type semiconductor read-only memory
06/10/1987EP0224843A2 Method for developing negative photoresists
06/10/1987EP0224747A1 Process and apparatus for mounting micropackages on substrates
06/10/1987EP0224717A2 Self-aligned channel stop
06/10/1987EP0224712A2 Integrated device comprising bipolar and complementary metal oxide semiconductor transistors
06/10/1987EP0224699A2 Method of forming fine conductive lines, patterns and connnectors
06/10/1987EP0224682A2 Method for fabricating a bipolar transistor
06/10/1987EP0224680A2 Diazoquinone sensitized polyamic acid based photoresist compositions having reduced dissolution rates in alkaline developers
06/10/1987EP0224646A2 Method for removing protuberances at the surface of a semiconductor wafer using a chem-mech polishing technique
06/10/1987EP0224614A1 Process of fabricating a fully self- aligned field effect transistor
06/10/1987EP0224582A1 Calibration apparatus for integrated circuits
06/10/1987EP0224501A1 Device for piling uniform objects, particularly plate-like objects.
06/10/1987CN86107141A Method for forming deposited film
06/10/1987CN86105868A Dynamic memory device having a single-crystal transistor on a trench capacitor structure and fabrication method therefor
06/10/1987CN86104342A Method for detecting and correcting failure in mounting of electronic parts on substrate and apparatus therefor
06/09/1987US4672676 Method and apparatus for automatically aligning an object with respect to a reference pattern
06/09/1987US4672586 Semiconductor memory having circuit effecting refresh on variable cycles
06/09/1987US4672584 CMOS integrated circuit
06/09/1987US4672582 Semiconductor device
06/09/1987US4672577 Three-dimensional integrated circuit with optically coupled shared memories
06/09/1987US4672420 Integrated circuit structure having conductive, protective layer for multilayer metallization to permit reworking
06/09/1987US4672419 Metal gate, interconnect and contact system for VLSI devices
06/09/1987US4672416 Semiconductor device
06/09/1987US4672415 Power thyristor on a substrate
06/09/1987US4672414 Planar heterojunction bipolar device and method
06/09/1987US4672410 Semiconductor memory device with trench surrounding each memory cell
06/09/1987US4672409 Nonvolatile semiconductor memory device
06/09/1987US4672408 Non-volatile semiconductor memory device
06/09/1987US4672406 Semiconductor member and semiconductor device employing the same
06/09/1987US4672402 Semiconductor circuit device including an overvoltage protection element
06/09/1987US4672313 Device for checking mobile electrical charges in a MOS integrated circuit
06/09/1987US4672241 High voltage isolation circuit for CMOS networks
06/09/1987US4672235 Bipolar power transistor
06/09/1987US4672210 For treating a semiconductor wafer
06/09/1987US4672185 Control system for semiconductor substrate process line
06/09/1987US4672099 Protective coatings; storage stable solutions
06/09/1987US4672023 Removing exposed layer of shipley az photoresist; recesses filled with unexposed part
06/09/1987US4672021 Photolithography
06/09/1987US4671970 Trench filling and planarization process
06/09/1987US4671928 Method of controlling the sintering of metal particles
06/09/1987US4671851 Depositing silicon nitride barrier; polishing with silica-water slurry
06/09/1987US4671850 Enhanced mechanical strength
06/09/1987US4671849 Method for control of etch profile
06/09/1987US4671847 Ethylene dibromide
06/09/1987US4671846 Method of bonding crystalline silicon bodies
06/09/1987US4671845 Method for producing high quality germanium-germanium nitride interfaces for germanium semiconductors and device produced thereby
06/09/1987US4671835 Applying adhesive film to annular frame
06/09/1987US4671830 Providing a disordering layer
06/09/1987US4671829 Manufacturing green light emitting diodes
06/09/1987US4671726 Cantilevered soft landing boat loader for semiconductor processing furnaces
06/09/1987US4671446 Method and system for automatically bonding a leadwire on a semiconductor
06/09/1987US4671204 Low compliance seal for gas-enhanced wafer cooling in vacuum
06/09/1987US4670968 Method of implanting uniform concentrations in solids having predetermined angular relationship with the ion-beam
06/09/1987US4670967 Forming multilayer interconnections for a semiconductor device by vapor phase growth process
06/09/1987CA1222835A1 Shallow-junction semiconductor devices
06/09/1987CA1222834A1 Method of forming a large surface area integrated circuit
06/09/1987CA1222832A1 Method for removal of carbonaceous residues from ceramic structures having internal metallurgy
06/09/1987CA1222821A1 Stacked semiconductor memory
06/09/1987CA1222820A1 Electronic matrix arrays and method for making the same
06/04/1987WO1987003425A1 Transistor having silicide contacts and method for producing same
06/04/1987WO1987003423A1 Semiconductor device
06/04/1987WO1987003364A1 Ink jet barrier layer and orifice plate printhead and fabrication method
06/04/1987WO1987003306A1 Method for fabricating articles having heteroepitaxial structures
06/04/1987DE3542485A1 Radical-ion salts of derivatives of 1,4,5,8-naphthalenetetracarboxylic acid, and process for preparing them
06/03/1987EP0224418A1 A programmable element for a semiconductor integrated circuit chip
06/03/1987EP0224360A2 Semiconductor device manufacturing method
06/03/1987EP0224274A2 Semiconductor device with protective means against overheating
06/03/1987EP0224199A1 Method for producing highly integrated circuits of p- and n-channel MOS transistors with gate electrodes consisting of a double layer of polysilicon and metal silicide
06/03/1987EP0224039A2 Process for making a planar trench semiconductor structure
06/03/1987EP0224022A2 Etchant and method for etching doped silicon
06/03/1987EP0224013A2 Method for producing coplanar multi-level metal/insulator films on a substrate
06/03/1987EP0223994A2 Method of forming a sub-micrometer trench structure on a semiconductor substrate
06/03/1987EP0223987A2 Method of forming organoglass layers and applications of such a method
06/03/1987EP0223986A2 Method for making self-aligned semiconductor structures
06/03/1987EP0223975A2 Diverter magnet arrangement for plasma processing system
06/03/1987EP0223920A2 Chem-mech polishing method for producing coplanar metal/insulator films on a substrate
06/03/1987EP0223836A1 Processing of metallic charge-transfer salts
06/03/1987EP0223787A1 Selective chemical vapor deposition method and apparatus.
06/03/1987EP0223780A1 Method for producing mos transistors having metal silicide electrodes.
06/03/1987EP0177562A4 Nitride bonding layer.
06/03/1987CN86107824A Solid-state image pick-up device with uniform distribution of dopant therein and production method therefor
06/03/1987CN86106824A Semi-conductor integrated circuits/systems
06/03/1987CN86106177A Method of growth of thin film layer for use in a composite semiconductor
06/03/1987CN86105186A Plasma treatment arrangement
06/02/1987USH291 Fully ion implanted junction field effect transistor
06/02/1987US4670877 LSI circuit with self-checking facilitating circuit built therein
06/02/1987US4670861 CMOS N-well bias generator and gating system
06/02/1987US4670769 Fabrication of isolated regions for use in self-aligning device process utilizing selective oxidation
06/02/1987US4670768 Complementary MOS integrated circuits having vertical channel FETs
06/02/1987US4670767 Hetero-junction bipolar transistor having a high switching speed
06/02/1987US4670763 Thin film field effect transistor
06/02/1987US4670762 Plasma decomposition, photolysis
06/02/1987US4670749 Integrated circuit programmable cross-point connection technique
06/02/1987US4670710 Noncontact full-line dynamic AC tester for integrated circuits
06/02/1987US4670672 C-MOS logic circuit supplied with narrow width pulses converted from input pulses
06/02/1987US4670669 Charge pumping structure for a substrate bias generator