Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
02/1993
02/09/1993US5185535 Control of backgate bias for low power high speed CMOS/SOI devices
02/09/1993US5185534 Monolithic parallel connected transistor structure
02/09/1993US5185502 High power, high density interconnect apparatus for integrated circuits
02/09/1993US5185419 Poly(arylenevinylenesiloxanes) compounds
02/09/1993US5185296 Forming thin film of radiation senstive material, irradiating, contacting with liquefied gas or supercritical fluid
02/09/1993US5185295 Method for dicing semiconductor substrates using a laser scribing and dual etch process
02/09/1993US5185294 Boron out-diffused surface strap process
02/09/1993US5185293 Method of forming and aligning patterns in deposted overlaying on GaAs
02/09/1993US5185292 Process for forming extremely thin edge-connectable integrated circuit structure
02/09/1993US5185291 Method of making severable conductive path in an integrated-circuit device
02/09/1993US5185287 Attaching cluster ions to substrate, accelerating with electric field and second field to follow different orbits, intercepting to attach
02/09/1993US5185286 Having no polycrystal regions
02/09/1993US5185285 Doping for high resistivity, covering with dielectric, patterning, doping, forming metal film, selective remoral and patterning
02/09/1993US5185282 Method of manufacturing DRAM cell having a cup shaped polysilicon storage electrode
02/09/1993US5185280 Method of fabricating a soi transistor with pocket implant and body-to-source (bts) contact
02/09/1993US5185279 Method of manufacturing insulated-gate type field effect transistor
02/09/1993US5185278 Method of making self-aligned gate providing improved breakdown voltage
02/09/1993US5185277 Method for the making of a transistor gate
02/09/1993US5185276 Method for improving low temperature current gain of bipolar transistors
02/09/1993US5185275 Snap-back preventing method for high voltage MOSFET
02/09/1993US5185274 Self-aligned, self-passivated advanced dual lift-off heterojunction bipolar transistor method
02/09/1993US5185273 Method for measuring ions implanted into a semiconductor substrate
02/09/1993US5185215 Zirconia toughening of glass-ceramic materials
02/09/1993US5185210 Photodefinable interlevel dielectrics
02/09/1993US5185209 Electronic interconnect structure; pattern from prepolymer which is an ether of the oligomeric condensation product of a dihydric phenol and formaldehyde
02/09/1993US5185058 Process for etching semiconductor devices
02/09/1993US5185056 Fluid is delivered to wafer on rotating support, spread by centrifugal force, removed
02/09/1993US5185054 Method for fabricating an exposure mask including a step for adhering mask body substrate to a supporting block
02/09/1993US5185040 Apparatus for forming electrode on electronic component
02/09/1993US5184723 Single wafer robotic package
02/09/1993US5184400 Method for manufacturing a twisted wire jumper electrical interconnector
02/09/1993US5184398 In-situ real-time sheet resistance measurement method
02/09/1993CA2075026A1 Method and apparatus for patterning an imaging member
02/09/1993CA2021285C Ceramic multilayer wiring substrate
02/09/1993CA1313569C Electrical switching device
02/04/1993WO1993002540A1 Machine tool with curved drive, especially for stamping and shaping the connecting pins of integrated circuits
02/04/1993WO1993002539A1 Machine tool with curved drive, especially for stamping and shaping the connecting pins of integrated circuits
02/04/1993WO1993002474A1 Power semiconductor component and process for producing it
02/04/1993WO1993002472A1 Semiconductor device and production thereof
02/04/1993WO1993002471A1 High temperature refractory silicide rectifying contact and method for making same
02/04/1993WO1993002470A1 Method for producing a charge-transfer integrated circuit having an antiglare system
02/04/1993WO1993002469A1 Method for producing integrated circuits having adjacent electrodes, and corresponding integrated circuits
02/04/1993WO1993002468A1 Chemical vapor deposition apparatus, method of semiconductor film formation, and method of producing thin film semiconductor device
02/04/1993WO1993002467A1 Apparatus for neutralizing charged body
02/04/1993DE4222791A1 Coil with metallic core integrated in semiconductor device - uses 3 metallisation layers which are selectively interconnected
02/04/1993DE4222272A1 Semiconductor wafer washing device - has front and rear wafer sides covered always with even film of clean water using min. amt. of water
02/04/1993DE4203114A1 Tape carrier for semiconductor appts. - involves tape body transport perforations, window accommodating semiconductor components, inner feeds and test electrodes
02/04/1993DE4125199A1 Kompakte halbleiterspeicheranordnung und verfahren zu deren herstellung Compact semiconductor memory device and methods for their preparation
02/03/1993EP0526376A1 Shape decomposition system and method
02/03/1993EP0526374A1 Lateral bipolar transistor and method of making the same
02/03/1993EP0526326A2 Method for preparing a superconducting thin film of compound oxide
02/03/1993EP0526312A1 Process and effusion cell for forming molecular beams
02/03/1993EP0526266A1 Method of manufacturing an optoelectronic device
02/03/1993EP0526245A1 An automatic cleaning apparatus for wafers
02/03/1993EP0526244A2 Method of forming a polysilicon buried contact
02/03/1993EP0526243A1 Via hole structure and process
02/03/1993EP0526242A1 Image projection method and semiconductor device manufacturing method using the same
02/03/1993EP0526212A2 Method of forming isolated regions of oxide
02/03/1993EP0526147A2 Film-carrier type semiconductor device and process for fabricating the same
02/03/1993EP0526133A2 Polyimide multilayer wiring substrate and method for manufacturing the same
02/03/1993EP0526107A1 Stepped multilayer interconnection apparatus and method of making the same
02/03/1993EP0526084A1 Insulated gate bipolar transistor and method of fabricating same
02/03/1993EP0526083A1 A semiconductor laser device
02/03/1993EP0526043A1 Semiconductor device with low resistance contact and method of manufacturing the same
02/03/1993EP0525990A1 Testing integrated circuit pad input and output structures
02/03/1993EP0525942A2 Integrated circuit fabrication process using a bilayer resist
02/03/1993EP0525939A2 Methods for protecting outputs of low-voltage circuits from high programming voltages
02/03/1993EP0525934A1 Pinch clip lid for non-hermetic packages
02/03/1993EP0525872A1 Positioning device having two manipulators operating in parallel, and optical lithographic device provided with such a positioning device
02/03/1993EP0525840A2 Programmable cell with a programmable component outside the signal path
02/03/1993EP0525824A2 A semiconductor device having metal wiring layers and method of manufacturing such a device
02/03/1993EP0525781A2 Method for making uniform the thickness of a Si single crystal thin film
02/03/1993EP0525779A2 Method of manufacturing optical semiconductor element
02/03/1993EP0525762A2 Microwave heterojunction bipolar transistors suitable for low-power, low-noise and high-power applications and method for fabricating same
02/03/1993EP0525721A1 High resolution lithography method
02/03/1993EP0525678A2 Nonvolatile semiconductor memory device having row decoder
02/03/1993EP0525651A1 Package structure for one or more IC chips
02/03/1993EP0525650A2 Semiconductor device with capacitor insulating film and method for fabricating the same
02/03/1993EP0525637A1 Method for the formation of tin barrier layer with preferential (111) crystallographic orientation
02/03/1993EP0525627A1 Oligomeric compounds containing acid-cleavable protective groups and positive groups and positive-working, radiation-sensitive composition prepared using these cmpounds
02/03/1993EP0525625A1 Negative-working radiation-sensitive composition and radiation-sensitive recording material produced therewith
02/03/1993EP0525619A1 Compound semiconductor single crystal
02/03/1993EP0525617A2 Liquid-phase growth process of compound semiconductor
02/03/1993EP0525576A1 Design flow methodology for an integrated circuit
02/03/1993EP0525517A1 Method of filling at least one contact hole in an insulating layer
02/03/1993EP0525497A1 Method for forming vias in multilayer circuits
02/03/1993EP0525464A1 Dielectric capacitor film for dram cell and method of forming the same
02/03/1993EP0525455A2 Extrinsic gettering for a semiconductor substrate
02/03/1993EP0525297A2 Method of growing doped crystal
02/03/1993EP0525293A1 Mask holder in exposure device
02/03/1993EP0525285A1 Sample holding device in exposure device and double-surface concurrent exposure device
02/03/1993EP0525256A1 Method of fabricating isolated device regions
02/03/1993EP0525202A1 Semiconductor manufacturing equipment
02/03/1993EP0524951A1 Process for manufacturing micro-mechanical sensors.
02/03/1993EP0524923A1 Process for applying a composite insulative coating to a substrate
02/03/1993CN1068681A Method for manufacturing semiconductor device
02/02/1993USH1137 Replacing step of growing polysilicon handle layer; conformal layer fills surface voids; planarization
02/02/1993US5184326 Integrated semiconductor memory of the dram type and method for testing the same
02/02/1993US5184235 Active matrix liquid crystal display panel with an electrostatic protection circuit
02/02/1993US5184207 Semiconductor die packages having lead support frame