Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
02/1994
02/15/1994US5287313 Method of testing data-holding capability of a semiconductor memory device
02/15/1994US5287312 Dynamic random access memory
02/15/1994US5287308 Undershoot resisting input circuit for semi-conductor device
02/15/1994US5287303 SCR type memory apparatus
02/15/1994US5287241 Shunt circuit for electrostatic discharge protection
02/15/1994US5287205 Gradation method for driving liquid crystal device with ramp and select signal
02/15/1994US5287142 Projection exposure apparatus
02/15/1994US5287082 Submicron isolated, released resistor structure
02/15/1994US5287072 Semiconductor device for improving high-frequency characteristics and avoiding chip cracking
02/15/1994US5287064 Bonding point polarity determining apparatus
02/15/1994US5287002 Planar multi-layer metal bonding pad
02/15/1994US5286998 Semiconductor device having two transistors forming a memory cell and a peripheral circuit, wherein the impurity region of the first transistor is not subjected to an etching atmosphere
02/15/1994US5286997 Method for forming an isolated, low resistance epitaxial subcollector for bipolar transistors
02/15/1994US5286996 Triple self-aligned bipolar junction transistor
02/15/1994US5286994 Semiconductor memory trap film assembly having plural laminated gate insulating films
02/15/1994US5286993 One-sided ozone TEOS spacer
02/15/1994US5286989 Solid state imaging device
02/15/1994US5286981 Turn-off power semiconductor component, and also process for producing it
02/15/1994US5286978 Method of removing electric charge accumulated on a semiconductor substrate in ion implantation
02/15/1994US5286963 Projection exposure apparatus and method, a semiconductor device manufacturing system and method, and a semiconductor device manufactured by illuminating an original having a circuit pattern when the original and a wafer are in a focused state
02/15/1994US5286713 Method for manufacturing an oxide superconducting circuit board by printing
02/15/1994US5286681 Method for manufacturing semiconductor device having a self-planarizing film
02/15/1994US5286680 Semiconductor die packages having lead support frame
02/15/1994US5286679 Method for attaching a semiconductor die to a leadframe using a patterned adhesive layer
02/15/1994US5286678 Forming active regions on semiconductor, depositing titanium metal, annealing, forming interconnects
02/15/1994US5286677 Method for etching improved contact openings to peripheral circuit regions of a dram integrated circuit
02/15/1994US5286676 Methods of making integrated circuit barrier structures
02/15/1994US5286675 Blanket tungsten etchback process using disposable spin-on-glass
02/15/1994US5286674 Method for forming a via structure and semiconductor device having the same
02/15/1994US5286673 Method for forming position alignment marks in a manufacturing SOI device
02/15/1994US5286672 Method for forming field oxide regions
02/15/1994US5286671 Etching to raise pattern and improve bonding strength
02/15/1994US5286670 Method of manufacturing a semiconductor device having buried elements with electrical characteristic
02/15/1994US5286669 Solid-state imaging device and method of manufacturing the same
02/15/1994US5286668 Layers of doped and undoped polysilicon, dielectric layer and top electrode layer; etching with phosphoric acid
02/15/1994US5286667 Modified and robust self-aligning contact process
02/15/1994US5286666 Method of producing semiconductor memory device
02/15/1994US5286664 Method for fabricating the LDD-MOSFET
02/15/1994US5286663 Methods for producing thin film transistor having a diode shunt
02/15/1994US5286662 Method for manufacturing field effect transistor
02/15/1994US5286661 Method of forming a bipolar transistor having an emitter overhang
02/15/1994US5286660 Method for doping a semiconductor wafer having a diffusivity enhancement region
02/15/1994US5286659 Method for producing an active matrix substrate
02/15/1994US5286658 Process for producing semiconductor device
02/15/1994US5286657 Single wafer megasonic semiconductor wafer processing system
02/15/1994US5286656 Individualized prepackage AC performance testing of IC dies on a wafer using DC parametric test patterns
02/15/1994US5286655 Method of manufacturing a semiconductor device of an anode short circuit structure
02/15/1994US5286611 Photoresist
02/15/1994US5286610 Illuminating thin region on semiconductor substrate to make it pervious to light and exposing photoresist underneath; selectively removing either region
02/15/1994US5286608 TiOx as an anti-reflection coating for metal lithography
02/15/1994US5286606 Treating ion exchange resin with water, then mineral acid solution, passing surfactant solution through ion exchange resin, mixing surfactant with metal ion free developer
02/15/1994US5286600 Negative photosensitive composition and method for forming a resist pattern by means thereof
02/15/1994US5286599 Novolak polymer and-or poly(p-vinylphenol), organosilicon material, amino polymer and catinic photocatalyst
02/15/1994US5286583 Forming thin film on transparent substrate, covering with photoresist, exposing to light of different intensities, developing, etching exposed thin film, eliminating resist in separate steps for each light intensity
02/15/1994US5286581 Phase-shift mask and method for making
02/15/1994US5286572 Planarizing ladder-type silsequioxane polymer insulation layer
02/15/1994US5286567 Pellicle for photolithographic mask
02/15/1994US5286524 Method for producing CVD diamond film substantially free of thermal stress-induced cracks
02/15/1994US5286523 Chaning positions which are disposed in the direction of gas flow in reaction vessel until optimal surface processing conditions are attained
02/15/1994US5286518 Integrated-circuit processing with progressive intermetal-dielectric deposition
02/15/1994US5286461 Method and apparatus for melt level detection in czochralski crystal growth systems
02/15/1994US5286426 Assembling a lead frame between a pair of molding cavity plates
02/15/1994US5286344 Fluorinated chemical etchant and fluorcarbon additive
02/15/1994US5286343 Method for protecting chip corners in wet chemical etching of wafers
02/15/1994US5286342 Etching, punching
02/15/1994US5286340 Process for controlling silicon etching by atomic hydrogen
02/15/1994US5286337 Reactive ion etching or indium tin oxide
02/15/1994US5286335 Processes for lift-off and deposition of thin film materials
02/15/1994US5286334 Nonselective germanium deposition by UHV/CVD
02/15/1994US5286331 High energy eetchant gas clostered through a nozzle
02/15/1994US5286329 Tape-on-wafer mounting apparatus and method
02/15/1994US5286297 Multi-electrode plasma processing apparatus
02/15/1994US5286296 Multi-chamber wafer process equipment having plural, physically communicating transfer means
02/15/1994US5286007 Heat treatment system
02/15/1994US5285949 Wire-bonding method, wire-bonding apparatus, and semiconductor device produced by the wire-bonding method
02/15/1994US5285943 Tape feeding apparatus
02/15/1994US5285597 Method and arrangement for subdividing semiconductor bars into semiconductor wafers
02/15/1994CA2104087A1 Glass etching composition and method
02/15/1994CA1327078C Floating gate memories
02/12/1994CA2101902A1 Fluid treatment apparatus and method
02/10/1994DE4326052A1 Vertical field effect transistor - has thickness of semiconductor layer selected to be greater than extent of depletion layer during blocking of p=n junction
02/10/1994DE4325706A1 Mfg. electrode or wiring layer on semiconductor device - forming metal oxide film and reducing to produce wiring layer e.g. of copper or silver
02/10/1994DE4325565A1 Conveying lead frame for semiconductor chip - using clamp mechanism to hold lead frame while moving into position w.r.t. heating block
02/10/1994DE4325348A1 Semiconductor device with p=n junction, e.g n=channel transistor - has impurity diffusion region between first impurity region and impurity concentration peak
02/10/1994DE4313797A1 Conductor for bonding in semiconductor chip - has perforated end section through conducting layer for connection to contact bumps on semiconductor chip
02/10/1994DE4239587A1 Semiconductor device formed on module substrate - has resin moulded package with conductors providing respective internal connections at one end and external connections at other
02/10/1994DE4226167A1 Device mounting on substrate by thermo:compression bonding - using electroplated gold@ contact bumps, esp. for chip on chip bonding
02/10/1994DE4225830A1 Positiv arbeitendes strahlungsempfindliches Gemisch und damit hergestelltes Aufzeichnungsmaterial Positive working radiation-sensitive mixture and thus produced recording material
02/09/1994EP0582539A1 Chemical pre-treatment and biological destruction of propylene carbonate waste effluent streams to reduce the biological oxygen demand thereof
02/09/1994EP0582538A2 Propylene carbonate recovery process
02/09/1994EP0582486A2 A thin film transistor pair and a process for fabricating the same
02/09/1994EP0582444A1 Ultra pure silicon carbide and high temperature semiconductor processing equipment made therefrom
02/09/1994EP0582387A1 A metallic wiring board and a method for producing the same
02/09/1994EP0582375A1 Solder particle deposition
02/09/1994EP0582353A1 Low stress electrodeposition of gold for X-ray mask fabrication
02/09/1994EP0582308A2 Photomask blank and phase shift photomask
02/09/1994EP0582306A1 Semiconductor device having hollowed conductor
02/09/1994EP0582295A2 Articulating endoscopic surgical apparatus
02/09/1994EP0582262A1 Contacting and packaging of integrated circuit modules
02/09/1994EP0582228A1 Process for forming amorphous silicon hydride film