Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
03/1994
03/10/1994DE4329803A1 Projection exposure method for ultra large scale integration chip mfr. - diffracting exposure light beam to eliminate perpendicular incidence angle component
03/10/1994DE4329335A1 Microcomputer IC card on wafer with test functions - has regions formed on wafer that provides debugging and test operations and can be broken off after use
03/10/1994DE4329304A1 Semiconductor memory device with electrical write-in and erasure, e.g. flash EEPROM - has insulating film of greater thickness than gate insulating layer applied to source and gate diffusion zones
03/10/1994DE4327653A1 Non-volatile semiconductor memory device for flash memory - has charge storage electrode and control electrode of larger width above isolation region than above channel region, in direction of cell column
03/10/1994DE4327652A1 Standard IC macro-cell design for clocked logic Sea Of Gates gate array - has set of power supply lines arranged near to, and on both sides of clock signal line to reduce cross=talk to signal lines
03/10/1994DE4326822A1 Static RAM integrated circuit for memory or photosensor - uses two complementary layers of Silicon-On-Insulator transistors or other silicon thin film construction
03/10/1994DE4309319A1 Thin layer solar cell - comprises active semiconductor thin layer having pn junction on substrate
03/10/1994DE4232373A1 Structural semiconductor layer deposition method - heating applied film using laser beam, to transfer the film material to surface of substrate
03/10/1994DE4229399A1 Prodn. of functional structure of semiconductor element - by forming all layers without lithography, and applying to substrate using physical method
03/10/1994DE4228218A1 Planarisation process for semiconductor substrate layer - applying pressure across entire surface of layer to remove unevenness prior to structuring
03/10/1994DE4228012A1 Spacing components esp. chip and carrier before soldering - uses acoustic signal to control chip manipulator
03/09/1994EP0586321A2 Supersaturated rare earth doped semiconductor layers by CVD
03/09/1994EP0586301A1 Process for the pretreatment of the reaction chamber and/or the substrate for the selective deposition of tungsten
03/09/1994EP0586243A1 Method and apparatus for assembling multichip modules
03/09/1994EP0586220A1 Reflection type liquid crystal display device
03/09/1994EP0586207A1 Integrated circuit output driver
03/09/1994EP0586195A1 Apparatus for providing consistent, non-jamming registration of semiconductor wafers
03/09/1994EP0586149A1 Hermetic protection for integrated circuits, based on a ceramic layer
03/09/1994EP0586147A1 A semiconductor device and method of manufacture
03/09/1994EP0586126A1 Glass etching composition and method
03/09/1994EP0585980A2 Radiation sensitive materials and devices made therewith
03/09/1994EP0585972A2 A semiconductor device and a method for the production of an insulated film used in this device
03/09/1994EP0585942A1 Dual gate MESFET
03/09/1994EP0585936A2 Metal selective removal process
03/09/1994EP0585876A1 Aluminum nitride sintered body and method of preparing the same
03/09/1994EP0585836A2 Process for making microstructures
03/09/1994EP0585640A2 Method of making contact for semiconductor device
03/09/1994EP0585601A1 Integrated circuit security system and method with implanted interconnections
03/09/1994EP0585491A1 Field of electric transistor of metal-oxide-semiconductor (MOSFET)
03/09/1994EP0585445A1 Sputtering apparatus with a magnet array having a geometry for a specified target erosion profile
03/09/1994EP0585376A1 Integrated circuit chip carrier
03/09/1994EP0585343A1 Primary flow cvd apparatus and method
03/09/1994EP0585229A1 Cluster tool soft etch module and ecr plasma generator therefor.
03/09/1994CN1083625A Thining method for silicon bound to insulator
03/09/1994CN1023953C Passivation method for semiconductor mesa device
03/08/1994US5293560 Multi-state flash EEPROM system using incremental programing and erasing methods
03/08/1994US5293557 Method of describing a surface of an object after processing
03/08/1994US5293543 Apparatus for color imager defect determination
03/08/1994US5293512 Semiconductor device having a groove type isolation region
03/08/1994US5293508 Ion implanter and controlling method therefor
03/08/1994US5293503 Semiconductor device having multilayer metal interconnection
03/08/1994US5293502 Integrated circuit package
03/08/1994US5293458 MOS Multi-layer neural network and its design method
03/08/1994US5293457 Neural network integrated circuit device having self-organizing function
03/08/1994US5293428 Optical apparatus for use in image recognition
03/08/1994US5293386 Integrated semiconductor memory with parallel test capability and redundancy method
03/08/1994US5293340 Dynamic random access memory device with multiple word line selector used in burn-in test
03/08/1994US5293337 Electrically erasable programmable read-only memory with electric field decreasing controller
03/08/1994US5293336 Semiconductor memory device and method for manufacturing the same
03/08/1994US5293334 Pattern layout of power source lines in semiconductor memory device
03/08/1994US5293331 High density EEPROM cell with tunnel oxide stripe
03/08/1994US5293328 Electrically reprogrammable EPROM cell with merged transistor and optiumum area
03/08/1994US5293217 Bonding wire inspection apparatus
03/08/1994US5293216 Sensor for semiconductor device manufacturing process control
03/08/1994US5293214 Apparatus and method for performing thin film layer thickness metrology by deforming a thin film layer into a reflective condenser
03/08/1994US5293212 Non-volatile semiconductor memory device allowing erase of storage data of an arbitrary memory cell and method of erasing data in non-volatile semiconductor memory device
03/08/1994US5293084 High speed logic circuit
03/08/1994US5293075 Semiconductor device with PZT/PLZT film and lead-containing electrode
03/08/1994US5293074 Ohmic contact to p-type ZnSe
03/08/1994US5293072 Semiconductor device having spherical terminals attached to the lead frame embedded within the package body
03/08/1994US5293071 Bump structure for bonding to a semi-conductor device
03/08/1994US5293068 Semiconductor device
03/08/1994US5293067 Integrated circuit chip carrier
03/08/1994US5293066 Semiconductor device mounting structure including lead frame and lead plate
03/08/1994US5293065 Lead frame having an outlet with a larger cross sectional area than the inlet
03/08/1994US5293062 FET nonvolatile memory with composite gate insulating layer
03/08/1994US5293061 Semiconductor device having an isolation layer region on the side wall of a groove
03/08/1994US5293060 Semiconductor device with diffusion well isolation
03/08/1994US5293059 MOS semiconductor device with double-layer gate electrode structure
03/08/1994US5293058 Linear voltage-controlled resistance element
03/08/1994US5293056 Semiconductor device with high off-breakdown-voltage and low on resistance
03/08/1994US5293055 Semiconductor integrated circuit device
03/08/1994US5293053 Integrated circuit device
03/08/1994US5293050 Semiconductor quantum dot light emitting/detecting devices
03/08/1994US5293025 Method for forming vias in multilayer circuits
03/08/1994US5293006 Interconnection system for a microelectronic substrate
03/08/1994US5293005 Electronic device having high-density wiring
03/08/1994US5292689 Method for planarizing semiconductor structure using subminimum features
03/08/1994US5292688 Solder interconnection structure on organic substrates and process for making
03/08/1994US5292687 Process for lay-out of a semiconductor integrated circuit
03/08/1994US5292686 Method of forming substrate vias in a GaAs wafer
03/08/1994US5292684 Semiconductor device with improved contact and method of making the same
03/08/1994US5292683 Method of isolating semiconductor devices and arrays of memory integrated circuitry
03/08/1994US5292682 Method of making two-phase charge coupled device
03/08/1994US5292681 Method of processing a semiconductor wafer to form an array of nonvolatile memory devices employing floating gate transistors and peripheral area having CMOS transistors
03/08/1994US5292680 Method of forming a convex charge coupled device
03/08/1994US5292679 Process for producing a semiconductor memory device having memory cells including transistors and capacitors
03/08/1994US5292678 Forming a bit line configuration for semiconductor memory
03/08/1994US5292677 Reduced mask CMOS process for fabricating stacked capacitor multi-megabit dynamic random access memories utilizing single etch stop layer for contacts
03/08/1994US5292676 Self-aligned low resistance buried contact process
03/08/1994US5292675 Method for forming a MOS transistor and structure thereof
03/08/1994US5292674 Method of making a metal-oxide semiconductor field-effect transistor
03/08/1994US5292673 Method of manufacturing a semiconductor device
03/08/1994US5292672 Method of manufacturing an insulated gate bipolar transistor
03/08/1994US5292671 Method of manufacture for semiconductor device by forming deep and shallow regions
03/08/1994US5292670 Sidewall doping technique for SOI transistors
03/08/1994US5292624 Method for forming a metallurgical interconnection layer package for a multilayer ceramic substrate
03/08/1994US5292619 Photosensitive polymer composition
03/08/1994US5292605 Method for control of photoresist develop processes
03/08/1994US5292558 Polyoxometalate coating