Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
04/2003
04/01/2003US6541395 Semiconductor processing method of forming field effect transistors
04/01/2003US6541394 Method of making a graded grown, high quality oxide layer for a semiconductor device
04/01/2003US6541393 Method for fabricating semiconductor device
04/01/2003US6541391 Methods of cleaning surfaces of copper-containing materials, and methods of forming openings to copper-containing substrates
04/01/2003US6541390 Method and composition for selectively etching against cobalt silicide
04/01/2003US6541389 Method of patterning a thin layer by chemical etching
04/01/2003US6541388 Plasma etching termination detecting method
04/01/2003US6541387 Process for implementation of a hardmask
04/01/2003US6541386 Method for producing a structure with narrow pores
04/01/2003US6541385 Method for plasma etching of Ir-Ta-O electrode and for post-etch cleaning
04/01/2003US6541383 Apparatus and method for planarizing the surface of a semiconductor wafer
04/01/2003US6541382 Lining and corner rounding method for shallow trench isolation
04/01/2003US6541381 Finishing method for semiconductor wafers using a lubricating boundary layer
04/01/2003US6541380 Plasma etching process for metals and metal oxides, including metals and metal oxides inert to oxidation
04/01/2003US6541379 Wiring forming method for semiconductor device
04/01/2003US6541378 High density connectors; connecting copper to dielectric; precleaning with argon; polyimide silicone epoxy adhesive
04/01/2003US6541377 Method and apparatus for preparing polysilicon granules
04/01/2003US6541376 Film forming method and film forming apparatus
04/01/2003US6541375 DC sputtering process for making smooth electrodes and thin film ferroelectric capacitors having improved memory retention
04/01/2003US6541374 Method of depositing a diffusion barrier for copper interconnection applications
04/01/2003US6541373 Manufacture method for semiconductor with small variation in MOS threshold voltage
04/01/2003US6541372 Method for manufacturing a conductor structure for an integrated circuit
04/01/2003US6541371 Apparatus and method for depositing superior Ta(N)/copper thin films for barrier and seed applications in semiconductor processing
04/01/2003US6541370 Composite microelectronic dielectric layer with inhibited crack susceptibility
04/01/2003US6541369 Method and apparatus for reducing fixed charges in a semiconductor device
04/01/2003US6541368 Metal lines of semiconductor devices and methods for forming
04/01/2003US6541367 Very low dielectric constant plasma-enhanced CVD films
04/01/2003US6541366 Method for improving a solder bump adhesion bond to a UBM contact layer
04/01/2003US6541365 Insulating interposer between two electronic components and process thereof
04/01/2003US6541364 Bump forming method and bump forming apparatus
04/01/2003US6541362 Methods of forming semiconductor structures
04/01/2003US6541361 Plasma enhanced method for increasing silicon-containing photoresist selectivity
04/01/2003US6541360 Bi-layer trim etch process to form integrated circuit gate structures
04/01/2003US6541359 Optimized gate implants for reducing dopant effects during gate etching
04/01/2003US6541358 Method of fabricating a semiconductor device by filling gaps between gate electrodes with HSQ
04/01/2003US6541357 Semiconductor device and method of manufacturing the same
04/01/2003US6541356 Ultimate SIMOX
04/01/2003US6541355 Method of selective epitaxial growth for semiconductor devices
04/01/2003US6541354 Method for forming silicon film
04/01/2003US6541353 Atomic layer doping apparatus and method
04/01/2003US6541352 Semiconductor die with contoured bottom surface and method for making same
04/01/2003US6541351 Method for limiting divot formation in post shallow trench isolation processes
04/01/2003US6541350 Method for fabricating shallow trench isolation
04/01/2003US6541349 Shallow trench isolation using non-conformal dielectric and planarizatrion
04/01/2003US6541348 Semiconductor device and manufacturing method thereof
04/01/2003US6541347 Method of providing planarity of a photoresist
04/01/2003US6541346 Method and apparatus for a self-aligned heterojunction bipolar transistor using dielectric assisted metal liftoff process
04/01/2003US6541345 Semiconductor device with SOI structure
04/01/2003US6541344 Substrate processing apparatus and semiconductor device manufacturing method
04/01/2003US6541343 Methods of making field effect transistor structure with partially isolated source/drain junctions
04/01/2003US6541342 Method for fabricating element isolating film of semiconductor device, and structure of the same
04/01/2003US6541341 Method for fabricating MOS field effect transistor
04/01/2003US6541340 Method of manufacturing a semiconductor device with a concave trench
04/01/2003US6541339 Nitride deposition wafer to wafer native oxide uniformity improvement for 0.35 flash erase performance by adding thermal oxide oxidation process
04/01/2003US6541338 Low defect density process for deep sub-0.18 μm flash memory technologies
04/01/2003US6541337 Semiconductor memory device and manufacturing method thereof
04/01/2003US6541336 Method of fabricating a bipolar transistor having a realigned emitter
04/01/2003US6541335 Semiconductor device and method for manufacturing the same
04/01/2003US6541334 Integrated circuit configuration having at least one buried circuit element and an insulating layer, and a method of manufacturing the integrated circuit configuration
04/01/2003US6541333 Semiconductor integrated circuit device and method of manufacturing the same
04/01/2003US6541332 Method for fabricating capacitor containing zirconium oxide dielectric layer
04/01/2003US6541331 Method of manufacturing high dielectric constant material
04/01/2003US6541330 Capacitor for semiconductor memory device and method of manufacturing the same
04/01/2003US6541329 Method for making an active pixel sensor
04/01/2003US6541328 Method of fabricating metal oxide semiconductor transistor with lightly doped impurity regions formed after removing spacers used for defining higher density impurity regions
04/01/2003US6541327 Method to form self-aligned source/drain CMOS device on insulated staircase oxide
04/01/2003US6541326 Nonvolatile semiconductor memory device and process of production and write method thereof
04/01/2003US6541325 Method for fabricating a capacitor device with BiCMOS process and the capacitor device formed thereby
04/01/2003US6541324 Method of forming a semiconductor array of floating gate memory cells having strap regions and a peripheral logic device region
04/01/2003US6541323 Method for fabricating polysilicon thin film transistor
04/01/2003US6541322 Method for preventing gate depletion effects of MOS transistor
04/01/2003US6541321 Method of making transistors with gate insulation layers of differing thickness
04/01/2003US6541320 Method to controllably form notched polysilicon gate structures
04/01/2003US6541319 Method of manufacturing a self-aligned gate transistor with P-type impurities selectively implanted below the gate, source and drain electrodes
04/01/2003US6541318 Manufacturing process of a high integration density power MOS device
04/01/2003US6541317 Polysilicon doped transistor
04/01/2003US6541316 Process for direct integration of a thin-film silicon p-n junction diode with a magnetic tunnel junction
04/01/2003US6541315 Semiconductor device and fabrication method thereof
04/01/2003US6541314 Semiconductor device with SOI structure and method of manufacturing the same
04/01/2003US6541313 Transistor and process for fabricating the same
04/01/2003US6541311 Method of positioning a component mounted on a lead frame in a test socket
04/01/2003US6541310 Method of fabricating a thin and fine ball-grid array package with embedded heat spreader
04/01/2003US6541308 Process for producing semiconductor package and structure thereof
04/01/2003US6541307 Multimedia chip package
04/01/2003US6541305 Single-melt enhanced reliability solder element interconnect
04/01/2003US6541304 Method of dispensing a viscous material
04/01/2003US6541303 Method for conducting heat in a flip-chip assembly
04/01/2003US6541301 Low RF loss direct die attach process and apparatus
04/01/2003US6541298 Method of making infrared sensor with a thermoelectric converting portion
04/01/2003US6541297 Method for fabricating semiconductor device and semiconductor device
04/01/2003US6541294 Semiconductor device and manufacturing method thereof
04/01/2003US6541285 Method of estimating lifetime of semiconductor device, and method of reliability simulation
04/01/2003US6541283 Method for determining magnification error portion of total misalignment error in a stepper
04/01/2003US6541282 Plasma processes for depositing low dielectric constant films
04/01/2003US6541281 Ferroelectric circuit element that can be fabricated at low temperatures and method for making the same
04/01/2003US6541280 Dielectric layer of lanthanum aluminate over the semiconductor substrate; and an electrode layer over the dielectric layer
04/01/2003US6541279 Method for forming an integrated circuit
04/01/2003US6541278 Method of forming film for semiconductor device with supercritical fluid
04/01/2003US6541184 Applying uniform layer of developer to photoresist using rotating chuck; spin coating; calibration
04/01/2003US6541182 Method for forming fine exposure patterns using dual exposure
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