Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
04/2003
04/03/2003WO2002099850A3 Interchangeable microdeposition head apparatus and method
04/03/2003WO2002097852A3 Plasma etching of silicon carbide
04/03/2003WO2002080367A3 Wireless programmable logic devices
04/03/2003WO2002069038A3 Novel polymers and photoresist compositions comprising same
04/03/2003WO2002065475A3 Self-aligned conductive line for cross-point magnetic memory integrated circuits
04/03/2003WO2002054457A3 Multi-layer pt electrode for dram and fram with high k dielectric materials
04/03/2003WO2002049118A3 Trench schottky barrier rectifier and method of making the same
04/03/2003WO2002049100A3 Method of forming vertical transistor gate for trench capacitor dram cell
04/03/2003WO2002045134A3 Gate process for dram array and logic devices on same chip
04/03/2003WO2002041361A3 Method for fabricating interfacial oxide in a transistor and related structure
04/03/2003WO2002016463A9 Polymers with high internal free volume
04/03/2003WO2002014846A9 Multiple beam inspection apparatus and method
04/03/2003WO2002013279A3 Metal catalyst technique for texturing silicon solar cells
04/03/2003WO2002013242A3 Composition for cleaning chemical mechanical planarization apparatus
04/03/2003WO2002010420A3 Silicatein-mediated synthesis of amorphous silicates and siloxanes and use thereof
04/03/2003WO2002004887A9 Methods and apparatus for processing microelectronic workpieces using metrology
04/03/2003WO2001071776A3 Materials having low dielectric constants and methods of making
04/03/2003US20030066038 Alleviating line end shortening by extending phase shifters
04/03/2003US20030066035 Photomask visual inspection system
04/03/2003US20030065996 Test circuit for semiconductor memory and semiconductor memory device
04/03/2003US20030065473 Individual configuration
04/03/2003US20030065471 Managing apparatus and managing method of a semiconductor manufacturing apparatus
04/03/2003US20030065411 Computer-implemented method of process analysis
04/03/2003US20030065123 Formed via catalytic hydrolysis and condensing of cyclic and/or cage-shape siloxanes (such as 2,4,6,8-tetramethyl-2,4,6,8-tetravinylcyclotetrasiloxane); heat/crack resistance
04/03/2003US20030065101 High resolution, dimensional stability; electronic devices with smaller feature sizes
04/03/2003US20030064902 Apparatus and process for producing polished semiconductor wafers
04/03/2003US20030064669 Low-force electrochemical mechanical processing method and apparatus
04/03/2003US20030064663 Abrasive article having a window system for polishing wafers, and methods
04/03/2003US20030064660 Toy top game unit
04/03/2003US20030064610 Oxidizing silicon compounds with oxygen containing compound at a constant RF power level; electrodeposition
04/03/2003US20030064609 Substrate processing apparatus and substrate processing method
04/03/2003US20030064608 Polymeric antireflective coatings deposited by plasma enhanced chemical vapor deposition
04/03/2003US20030064607 Method for improving nucleation and adhesion of CVD and ALD films deposited onto low-dielectric-constant dielectrics
04/03/2003US20030064605 Film planarization for low-k polymers used in semiconductor structures
04/03/2003US20030064604 One step process in one chamber, using a patterned hardmasks with an HBr, NF3, O2 at high power, low pressure to open a hole in wafer, through silicon and silicon dioxide layers; maintains structural integrity, etch selectivity; semiconductors
04/03/2003US20030064603 Manufacture method for semiconductor device having silicon-containing insulating film
04/03/2003US20030064602 Tungsten hard mask
04/03/2003US20030064601 Method for via etching in organo-silica-glass
04/03/2003US20030064600 Process window enhancement for deep trench spacer conservation
04/03/2003US20030064599 Pattern forming method
04/03/2003US20030064598 Method of buried strap out-diffusion formation by gas phase doping
04/03/2003US20030064597 Method of semiconductor device isolation
04/03/2003US20030064596 Method of polishing a semiconductor wafer surface
04/03/2003US20030064593 Barrier and seed layer system
04/03/2003US20030064592 Protective tape applying and separating methods
04/03/2003US20030064591 Method of etching a layer in a trench and method of fabricating a trench capacitor
04/03/2003US20030064590 Method of plasma etching platinum
04/03/2003US20030064589 Method for forming inside nitride spacer for deep trench device DRAM cell
04/03/2003US20030064588 Diamond barrier layer
04/03/2003US20030064587 Method and apparatus for polishing a copper layer and method for forming a wiring structure using copper
04/03/2003US20030064586 Method and apparatus for controlling contamination during the electroplating deposition of metals onto a semiconductor wafer surface
04/03/2003US20030064585 Manufacture of semiconductor device with spacing narrower than lithography limit
04/03/2003US20030064583 Method and device for on-chip decoupling capacitor using nanostructures as bottom electrode
04/03/2003US20030064582 Mask layer and interconnect structure for dual damascene semiconductor manufacturing
04/03/2003US20030064581 Process of making dual damascene structures using a sacrificial polymer
04/03/2003US20030064580 Dual-damascene interconnects without an etch stop layer by alternating ILDs
04/03/2003US20030064579 Surface protecting adhesive film for semiconductor wafer and protecting method for semiconductor wafer using said adhesive film
04/03/2003US20030064578 Method for fabricating semiconductor integrated circuit
04/03/2003US20030064577 Method of making air gaps copper interconnect
04/03/2003US20030064576 Low temperature sidewall oxidation of w/wn/poly-gatestack
04/03/2003US20030064575 Method for manufacturing a high frequency semiconductor structure and high frequency semiconductor structure
04/03/2003US20030064574 Asymmetrical mosfet layout for high currents and high speed operation
04/03/2003US20030064573 Method for producing a MOS transistor and MOS transistor
04/03/2003US20030064571 Process for producing polysilicon film
04/03/2003US20030064570 Juxtaposed island manufacturing method by means of self-organised deposition on a substrate and structure obtained using said method
04/03/2003US20030064569 Method of peeling off and method of manufacturing semiconductor device
04/03/2003US20030064568 Device comprising electronic components in regions of a layer of semiconducting material insulated from each other and manufacturing process for such a device
04/03/2003US20030064567 Vertical replacement-gate silicon-on-insulator transistor
04/03/2003US20030064566 Oxygen barrier for cell container process
04/03/2003US20030064564 Method of fabrication a flash memory cell
04/03/2003US20030064563 Flash memory and method of forming flash memory
04/03/2003US20030064562 Contact structure a semiconductor device and manufacturing method thereof
04/03/2003US20030064561 Method for producing a semiconductor structure, and use of the method
04/03/2003US20030064560 Method for manufacturing a semiconductor device
04/03/2003US20030064558 Process for manufacturing electronic devices comprising nonvolatile memory cells of reduced dimensions
04/03/2003US20030064557 Semiconductor processing methods of forming a plurality of capacitors on a substrate, bit line contacts and method of forming bit line contacts
04/03/2003US20030064556 Methods and apparatus for producing stable low k FSG film for HDP-CVD
04/03/2003US20030064555 Bipolar transistor with raised extrinsic base fabricated in an integrated BiCMOS circuit
04/03/2003US20030064554 CMOS process for double vertical channel thin film transistor
04/03/2003US20030064553 Method of producing semiconductor device and its structure
04/03/2003US20030064551 Method of forming predominantly <100> polycrystalline silicon thin film transistors
04/03/2003US20030064550 Method of ion implantation for achieving desired dopant concentration
04/03/2003US20030064549 Method of manufacturing a semiconductor device
04/03/2003US20030064543 Method and system for die transfer
04/03/2003US20030064541 ZnO film, method for manufacturing the same, and luminescent element including the same
04/03/2003US20030064540 Procedure for encapsulation of electronic devices
04/03/2003US20030064538 Bipolar transistor, semiconductor light emitting device and semiconductor device
04/03/2003US20030064535 Method of manufacturing a semiconductor device having a thin GaN material directly bonded to an optimized substrate
04/03/2003US20030064534 Method for determining optical constant of antireflective layer, and method for forming resist pattern
04/03/2003US20030064533 Method and apparatus for monitoring in-line copper contamination
04/03/2003US20030064531 Semiconductor wafer identification
04/03/2003US20030064521 Method for ending point detection during etching process
04/03/2003US20030064506 Device for receiving a chip shaped carrier and process for assembling a plurality of such devices
04/03/2003US20030064422 Method and system for collecting and transmitting chemical information
04/03/2003US20030064391 Preparation of sequences on substrate; obtain substrate, deposit on plate surface, incubate with activator, remove protective groups, recover biopolymer
04/03/2003US20030064326 Resist stripper, resist stripping method, and thin film circuit device formation method
04/03/2003US20030064307 Process for forming latent image, process for detecting latent image, process and device for exposure, exposure apparatus, resist and substrate
04/03/2003US20030064300 Pattern transfer method using a mask and half tone mask
04/03/2003US20030064298 Optical proximity correction method utilizing phase-edges as sub-resolution assist features
04/03/2003US20030064254 Polysilicate with units of hydrogensilsesquioxane and a mono-, di-, or tri-alkoxysilicate; heating, curing and pyrolysis to remove alkoxy groups results in a porous dielectric for electronic substrates
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