Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
04/2003
04/15/2003US6548850 Trench capacitor configuration and method of producing it
04/15/2003US6548849 Magnetic yoke structures in MRAM devices to reduce programming power consumption and a method to make the same
04/15/2003US6548847 Semiconductor integrated circuit device having a first wiring strip exposed through a connecting hole, a transition-metal film in the connecting hole and an aluminum wiring strip thereover, and a transition-metal nitride film between the aluminum wiring strip and the transition-metal film
04/15/2003US6548846 Storage capacitor for a DRAM
04/15/2003US6548845 Having a capacitor over bit line structure; dielectric prevents wiring from being oxidized
04/15/2003US6548844 Capacitor having a structure capable of restraining deterioration of dielectric film, semiconductor device having the capacitor and method of manufacturing the same
04/15/2003US6548843 Ferroelectric storage read-write memory
04/15/2003US6548842 Field-effect transistor for alleviating short-channel effects
04/15/2003US6548838 Field-effect transistor, bipolar transistor, and methods of fabricating the same
04/15/2003US6548831 For removing an etching stopper layer on an intersection portion of gate line without additional exposure; photoresists
04/15/2003US6548830 Semiconductor device formed of single crystal grains in a grid pattern
04/15/2003US6548829 Thin-film transistor
04/15/2003US6548828 Thin-film transistor and method of manufacturing thin-film transistor with tapered gate of 20 degrees or less
04/15/2003US6548827 Electroconductivity; positioning; accuracy
04/15/2003US6548764 Semiconductor packages and methods for making the same
04/15/2003US6548756 Packaging and interconnection of contact structure
04/15/2003US6548685 Dissolving NbCl5 (niobium chloride) or TaCl5(tantalum chloride) in an alcohol containing ammonia; reacting in low temperature to form niobium(V) alkoxide or the tantalum(V) alkoxide
04/15/2003US6548683 Methods, complexes and system for forming metal-containing films
04/15/2003US6548613 Polymerization of acrylic and vinyl monomers to produce a polymer that can be used in a submicrolithographic process; semiconductors
04/15/2003US6548575 High temperature underfilling material with low exotherm during use
04/15/2003US6548426 Method for improving a quality of dielectric layer and semiconductor device
04/15/2003US6548425 Method for fabricating an ONO layer of an NROM
04/15/2003US6548424 Process for producing oxide thin films
04/15/2003US6548423 Multilayer anti-reflective coating process for integrated circuit fabrication
04/15/2003US6548422 Method and structure for oxide/silicon nitride interface substructure improvements
04/15/2003US6548421 Method for forming a refractory-metal-silicide layer in a semiconductor device
04/15/2003US6548420 Measurement and analysis of mercury-based pseudo-field effect transistors
04/15/2003US6548419 Wet etching system for manufacturing semiconductor devices and wet etching method using the same
04/15/2003US6548418 Dual layer etch stop barrier
04/15/2003US6548416 Plasma ashing process
04/15/2003US6548415 Method for the etchback of a conductive material
04/15/2003US6548414 Method of plasma etching thin films of difficult to dry etch materials
04/15/2003US6548413 Method to reduce microloading in metal etching
04/15/2003US6548412 Method of forming patterned thin film
04/15/2003US6548411 Apparatus and methods for processing a workpiece
04/15/2003US6548410 Method of fabricating wires for semiconductor devices
04/15/2003US6548409 Method of reducing micro-scratches during tungsten CMP
04/15/2003US6548408 Method of minimizing repetitive chemical-mechanical polishing scratch marks, method of processing a semiconductor wafer outer surface, method of minimizing undesired node-to-node shorts of a length less than or equal to 0.3 micron, and semiconductor processing method
04/15/2003US6548407 Method and apparatus for controlling chemical interactions during planarization of microelectronic substrates
04/15/2003US6548406 Method for forming integrated circuit having MONOS device and mixed-signal circuit
04/15/2003US6548405 Batch processing for semiconductor wafers to form aluminum nitride and titanium aluminum nitride
04/15/2003US6548404 Method and apparatus for manufacturing semiconductor devices
04/15/2003US6548403 Silicon oxide liner for reduced nickel silicide bridging
04/15/2003US6548402 Method of depositing a thick titanium nitride film
04/15/2003US6548401 Semiconductor processing methods, and semiconductor constructions
04/15/2003US6548400 Method of fabricating interlevel connectors using only one photomask step
04/15/2003US6548399 Method of forming a semiconductor device using a carbon doped oxide layer to control the chemical mechanical polishing of a dielectric layer
04/15/2003US6548398 Production method of semiconductor device and production device therefor
04/15/2003US6548396 Method of producing an interconnect structure for an integrated circuit
04/15/2003US6548395 Method of promoting void free copper interconnects
04/15/2003US6548394 Method of forming contact plugs
04/15/2003US6548393 Semiconductor chip assembly with hardened connection joint
04/15/2003US6548392 Methods of a high density flip chip memory arrays
04/15/2003US6548391 Method of vertically integrating electric components by means of back contacting
04/15/2003US6548390 Semiconductor processing methods of forming contact openings, methods of forming memory circuitry, methods of forming electrical connections, and methods of forming dynamic random access memory (dram) circuitry
04/15/2003US6548389 Semiconductor device and method for fabricating the same
04/15/2003US6548388 Semiconductor device including gate electrode having damascene structure and method of fabricating the same
04/15/2003US6548387 Method for reducing hole defects in the polysilicon layer
04/15/2003US6548386 Method for forming and patterning film
04/15/2003US6548385 Method for reducing pitch between conductive features, and structure formed using the method
04/15/2003US6548384 Method for performing lithographic process to a multi-layered photoresist layer
04/15/2003US6548383 Twin well methods of forming CMOS integrated circuitry
04/15/2003US6548382 Gettering technique for wafers made using a controlled cleaving process
04/15/2003US6548381 Ion beam irradiation apparatus and method of igniting a plasma for the same
04/15/2003US6548380 Semiconductor thin film, semiconductor device employing the same, methods for manufacturing the same and device for manufacturing a semiconductor thin film
04/15/2003US6548379 SOI substrate and method for manufacturing the same
04/15/2003US6548378 Method of boron doping wafers using a vertical oven system
04/15/2003US6548377 Method for forming a line of semiconductor device
04/15/2003US6548376 Methods of thinning microelectronic workpieces
04/15/2003US6548375 Method of preparing silicon-on-insulator substrates particularly suited for microwave applications
04/15/2003US6548374 Method for self-aligned shallow trench isolation and method of manufacturing non-volatile memory device comprising the same
04/15/2003US6548373 Method for forming shallow trench isolation structure
04/15/2003US6548372 Forming sidewall oxide layers for trench isolation
04/15/2003US6548371 Method of forming a groove-like area in a semiconductor device
04/15/2003US6548370 Method of crystallizing a semiconductor layer by applying laser irradiation that vary in energy to its top and bottom surfaces
04/15/2003US6548369 Multi-thickness silicon films on a single semiconductor-on-insulator (SOI) chip using simox
04/15/2003US6548368 Method of forming a MIS capacitor
04/15/2003US6548367 Method to fabricate MIM capacitor with a curvillnear surface using damascene process
04/15/2003US6548366 Method of two-step annealing of ultra-thin silicon dioxide layers for uniform nitrogen profile
04/15/2003US6548365 Monolithic integrated circuit incorporating an inductive component and process for fabricating such an integrated circuit
04/15/2003US6548364 Self-aligned SiGe HBT BiCMOS on SOI substrate and method of fabricating the same
04/15/2003US6548363 Method to reduce the gate induced drain leakage current in CMOS devices
04/15/2003US6548362 Method of forming MOSFET with buried contact and air-gap gate structure
04/15/2003US6548361 SOI MOSFET and method of fabrication
04/15/2003US6548359 Asymmetrical devices for short gate length performance with disposable sidewall
04/15/2003US6548357 Modified gate processing for optimized definition of array and logic devices on same chip
04/15/2003US6548356 Thin film transistor
04/15/2003US6548355 EEPROM memory cell and corresponding manufacturing method
04/15/2003US6548354 Process for producing a semiconductor memory device comprising mass-storage memory cells and shielded memory cells for storing reserved information
04/15/2003US6548353 Method of making nonvolatile memory device having reduced capacitance between floating gate and substrate
04/15/2003US6548352 Multi-layered gate for a CMOS imager
04/15/2003US6548351 Method for fabricating semiconductor capacitor
04/15/2003US6548350 Method of fabricating an integrated circuit configuration with at least one capacitor
04/15/2003US6548349 Method for fabricating a cylinder-type capacitor for a semiconductor device
04/15/2003US6548348 Method of forming a storage node contact hole in a porous insulator layer
04/15/2003US6548347 Method of forming minimally spaced word lines
04/15/2003US6548346 Process for forming DRAM cell
04/15/2003US6548345 Method of fabricating trench for SOI merged logic DRAM
04/15/2003US6548344 Spacer formation process using oxide shield
04/15/2003US6548343 Method of fabricating a ferroelectric memory cell