Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
08/2003
08/21/2003WO2003068669A1 Deflectable microstructure and method of manufacturing the same through bonding of wafers
08/21/2003WO2003068442A1 A plasma processing apparatus and method
08/21/2003WO2003068421A2 Integrated system for processing semiconductor wafers
08/21/2003WO2003059782B1 Wafer carrier door and latching mechanism with hourglass shaped key slot
08/21/2003WO2003058677A3 System for the production of electric and integrated circuits
08/21/2003WO2003052817A3 Method of bonding and transferring a material to form a semiconductor device
08/21/2003WO2003049172B1 Lanthanide series layered superlattice materials for integrated circuit applications
08/21/2003WO2003047037A3 Fabrication of a high resolution biological molecule detection device with aluminum electrical conductors
08/21/2003WO2003038878A3 Method for fabricating semiconductor structures
08/21/2003WO2003036697A3 Methods of hyperdoping semiconductor materials and hyperdoped semiconductor materials and devices
08/21/2003WO2003032084A3 Low viscosity precursor compositions and methods for the deposition of conductive electronic features
08/21/2003WO2003031679A3 Method for depositing metal layers employing sequential deposition techniques
08/21/2003WO2003030081A3 Semiconductor wafer identification
08/21/2003WO2003018860A3 Atmospheric pressure wafer processing reactor having an internal pressure control system and method
08/21/2003WO2003014750A3 Application-specific testing methods for programmable logic devices
08/21/2003WO2003007348A3 Apparatus and method for controlling galvanic corrosion effects on a single-wafer cleaning system
08/21/2003WO2003003419A3 Four-bar linkage wafer clamping mechanism
08/21/2003WO2003001600A3 Memory cell, memory cell configuration and method for producing the same
08/21/2003WO2002101750A3 Digital magnetic storage cell device
08/21/2003WO2002099846A3 Integrated semiconductor devices for interacting with magnetic storage media
08/21/2003WO2002099845A3 Electronic chip and electronic chip assembly
08/21/2003WO2002095827A3 Method for producing a semiconductor storage device
08/21/2003WO2002091496A3 Reversible field-programmable electric interconnects
08/21/2003WO2002089178A3 Embedded metal nanocrystals
08/21/2003WO2002084745A3 Power semiconductor devices and methods of forming same
08/21/2003WO2002061801A3 Dual gate process using self-assembled molecular layer
08/21/2003WO2002054453A9 Zirconia toughened ceramic components and coatings in semiconductor processing equipment and method of manufacture thereof
08/21/2003WO2002047165A3 Method and apparatus for considering diagonal wiring in placement
08/21/2003WO2002045152A3 Flip chip mounting technique
08/21/2003WO2002004573A3 Ready-to-use stable chemical-mechanical polishing slurries
08/21/2003US20030159119 Method for designing semiconductor integrated circuit and computing program for semiconductor integrated circuit
08/21/2003US20030159117 Method for designing LSI system
08/21/2003US20030159096 Boundary scan with ground bounce recovery
08/21/2003US20030159079 Synchronous semiconductor device
08/21/2003US20030158714 Wiring optimizations for power
08/21/2003US20030158713 Method and computer software product for calculating and presenting a numerical value representative of a property of a circuit
08/21/2003US20030158705 Method for avoiding irregular shutoff of production equipment and system for avoiding irregular shutoff
08/21/2003US20030158690 Systems and methods for facilitating automated test equipment functionality within integrated circuits
08/21/2003US20030158679 Anomaly detection system
08/21/2003US20030158630 System and method for point of use delivery, control and mixing chemical and slurry for CMP/cleaning system
08/21/2003US20030158618 Push-type scheduling for semiconductor fabrication
08/21/2003US20030158059 Detergent composition
08/21/2003US20030158058 Used to remove photoresist during the manufacture of semiconductor devices such as large-scale integrated circuits (LSI), and very large-scale integrated circuits (VLSI)
08/21/2003US20030157870 Vacuum suction membrane for holding silicon wafer
08/21/2003US20030157815 Ammonia gas passivation on nitride encapsulated devices
08/21/2003US20030157814 Method for preparing nitrogen-doped annealed wafer and nitrogen-doped and annealed wafer
08/21/2003US20030157813 Athermal annealing with rapid thermal annealing system and method
08/21/2003US20030157812 Method and apparatus for modifying the profile of narrow, high-aspect-ratio gaps using RF power
08/21/2003US20030157811 Semiconductor device
08/21/2003US20030157810 Semiconductor device and method of manufacturing the same
08/21/2003US20030157809 Method for TMAH etching of CMOS integrated circuits
08/21/2003US20030157808 Photoresist reflow for enhanced process window for random, isolated, semi-dense, and other non-dense contacts
08/21/2003US20030157807 Process of forming an electrically erasable programmable read only memory with an oxide layer exposed to hydrogen and nitrogen
08/21/2003US20030157806 Chemical amplification type photoresist composition, method for producing a semiconductor device using the composition , and semiconductor substrate
08/21/2003US20030157805 Thick traces from multiple damascene layers
08/21/2003US20030157804 For use in fabricating semiconductors, integrated circuits and microelectromechanical systems
08/21/2003US20030157802 Method and solution for preparing SEM samples for low-K materials
08/21/2003US20030157801 Resist pattern thickening material, resist pattern and forming process thereof, and semiconductor device and manufacturing process thereof
08/21/2003US20030157799 Sputtering method for filling holes with copper
08/21/2003US20030157798 Method for fabricating a component, and component having a metal layer and an insulation layer
08/21/2003US20030157797 High throughput process for the formation of a refractory metal nucleation layer
08/21/2003US20030157796 Etch stop layer for silicon (si) via etch in three-dimensional (3-d) wafer-to-wafer vertical stack
08/21/2003US20030157795 Self-aligned patterning in dual damascene process
08/21/2003US20030157794 Edge seal for a semiconductor device
08/21/2003US20030157793 Methods of forming semiconductor structures
08/21/2003US20030157792 Bump manufacturing method
08/21/2003US20030157791 Process of fabricating bumps
08/21/2003US20030157790 Method of forming bump
08/21/2003US20030157789 Bump manufacturing method
08/21/2003US20030157788 Method of suppressing void formation in a metal line
08/21/2003US20030157787 Method of forming a germanium film on a semiconductor substrate that includes the formation of a graded silicon-germanium buffer layer prior to the formation of a germanium layer
08/21/2003US20030157786 Treatment to eliminate polysilicon defects induced by metallic contaminants
08/21/2003US20030157785 Method of forming a thin film transistor on a transparent plate
08/21/2003US20030157784 Process and apparatus to subdivide objects
08/21/2003US20030157783 Use of sacrificial layers in the manufacture of high performance systems on tailored substrates
08/21/2003US20030157782 Dielectric recess for wafer-to-wafer and die-to-die metal bonding and method of fabricating the same
08/21/2003US20030157781 Method of filling trenches
08/21/2003US20030157780 Method of alignment for buried structures formed by surface transformation of empty spaces in solid state materials
08/21/2003US20030157779 Method for applying adjusting marks on a semiconductor disk
08/21/2003US20030157778 BiCMOS process with low temperature coefficient resistor (TCRL)
08/21/2003US20030157777 Method of fabricating self-aligned silicon carbide semiconductor devices
08/21/2003US20030157776 Methods of fabricating aluminum gallium nitride/gallium nitride high electron mobility transistors having a gate contact on a gallium nitride based cap segment
08/21/2003US20030157775 Method for manufacturing semiconductor device with hetero junction bipolar transistor
08/21/2003US20030157774 Method for manufacturing semiconductor device
08/21/2003US20030157773 Semiconductor device having a dielectric layer with a uniform nitrogen profile
08/21/2003US20030157772 Method of forming layers of oxide on a surface of a substrate
08/21/2003US20030157771 Method of forming an ultra-thin gate dielectric by soft plasma nitridation
08/21/2003US20030157770 Method of making the selection gate in a split-gate flash eeprom cell and its structure
08/21/2003US20030157769 Method of fabricating an integrated circuit with a dielectric layer exposed to a hydrogen-bearing nitrogen source
08/21/2003US20030157768 Method of manufacturing semiconductor integrated circuit device
08/21/2003US20030157767 Method of manufacturing semiconductor device
08/21/2003US20030157766 Method of making ferroelectric material utilizing anneal in an electrical field
08/21/2003US20030157765 Capacitor with stoichiometrically adjusted dielectric and method of fabricating same
08/21/2003US20030157764 Evaporated LaA1O3 films for gate dielectrics
08/21/2003US20030157763 Semiconductor memory and its production process
08/21/2003US20030157761 Method for forming bumps, semiconductor device, and solder paste
08/21/2003US20030157760 Deposition of tungsten films for dynamic random access memory (DRAM) applications
08/21/2003US20030157759 Method for forming semiconductor substrate with convex shaped active region
08/21/2003US20030157758 Non-volatile semiconductor memory device and manufacturing method therefor
08/21/2003US20030157757 Method of manufacturing a semiconductor integrated circuit device
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