Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
09/2003
09/02/2003US6613666 Method of reducing plasma charging damage during dielectric etch process for dual damascene interconnect structures
09/02/2003US6613665 Process for forming integrated circuit structure comprising layer of low k dielectric material having antireflective properties in an upper surface
09/02/2003US6613664 Barbed vias for electrical and mechanical connection between conductive layers in semiconductor devices
09/02/2003US6613663 Method for forming barrier layers for solder bumps
09/02/2003US6613662 Method for making projected contact structures for engaging bumped semiconductor devices
09/02/2003US6613661 Process for fabricating secure integrated circuit
09/02/2003US6613660 Metallization process sequence for a barrier metal layer
09/02/2003US6613659 Manufacturing method of gate insulating film of multiple thickness
09/02/2003US6613658 MIS field effect transistor and method of manufacturing the same
09/02/2003US6613657 BPSG, SA-CVD liner/P-HDP gap fill
09/02/2003US6613656 Sequential pulse deposition
09/02/2003US6613655 Method of fabricating system on chip device
09/02/2003US6613654 Fabrication of semiconductor devices with transition metal boride films as diffusion barriers
09/02/2003US6613653 Method of doping silicon, metal doped silicon, method of making solar cells, and solar cells
09/02/2003US6613652 Method for fabricating SOI devices with option of incorporating air-gap feature for better insulation and performance
09/02/2003US6613651 Integrated circuit isolation system
09/02/2003US6613650 Active matrix ESD protection and testing scheme
09/02/2003US6613649 Method for buffer STI scheme with a hard mask layer as an oxidation barrier
09/02/2003US6613648 Shallow trench isolation using TEOS cap and polysilicon pullback
09/02/2003US6613647 Semiconductor device having a trench isolation structure and method for fabricating the same
09/02/2003US6613646 Methods for reduced trench isolation step height
09/02/2003US6613645 Method of manufacturing semiconductor device with glue layer in opening
09/02/2003US6613644 Method for forming a dielectric zone in a semiconductor substrate
09/02/2003US6613643 Structure, and a method of realizing, for efficient heat removal on SOI
09/02/2003US6613642 Method for surface roughness enhancement in semiconductor capacitor manufacturing
09/02/2003US6613641 Production of metal insulator metal (MIM) structures using anodizing process
09/02/2003US6613640 Method for fabricating an integrated ferroelectric semiconductor memory and integrated ferroelectric semiconductor memory
09/02/2003US6613639 Forming a semiconductor on implanted insulator
09/02/2003US6613638 Soi annealing method for reducing HF defects, with lamp, without crystal original particle (COP)
09/02/2003US6613637 Composite spacer scheme with low overlapped parasitic capacitance
09/02/2003US6613636 Method for fabricating semiconductor device
09/02/2003US6613635 Method of fabricating semiconductor device having element isolation trench
09/02/2003US6613634 Method of manufacturing a semiconductor device using oblique ion injection
09/02/2003US6613633 Method for manufacturing a high power semiconductor device having a field plate extendedly disposed on a gate
09/02/2003US6613632 Fabrication method for a silicon nitride read-only memory
09/02/2003US6613631 Method of forming a non-volatile semiconductor memory device with a tunnel barrier film defined by side walls
09/02/2003US6613630 Nonvolatile memory device and fabricating method thereof
09/02/2003US6613629 Methods for manufacturing storage nodes of stacked capacitors
09/02/2003US6613628 Method and structure for reducing leakage current in capacitors
09/02/2003US6613626 Method of forming CMOS transistor having a deep sub-micron mid-gap metal gate
09/02/2003US6613625 Method of manufacturing a semiconductor device
09/02/2003US6613624 Method for fabricating an integrated semiconductor circuit
09/02/2003US6613623 High fMAX deep submicron MOSFET
09/02/2003US6613621 Methods of forming self-aligned contact pads using a damascene gate process
09/02/2003US6613620 Semiconductor device and method of manufacturing the same
09/02/2003US6613619 Semiconductor device and method for producing the same
09/02/2003US6613618 Thin-film transistor and method of producing the same
09/02/2003US6613617 Cross-diffusion resistant dual-polycide semiconductor structure and method
09/02/2003US6613616 Method for fabricating field-effect transistors in integrated semiconductor circuits and integrated semiconductor circuit fabricated with a field-effect transistor of this type including a dual gate
09/02/2003US6613615 Pair of FETs including a shared SOI body contact and the method of forming the FETs
09/02/2003US6613614 Semiconductor device and method of manufacturing the semiconductor device
09/02/2003US6613613 Thin film type monolithic semiconductor device
09/02/2003US6613612 Fuse in semiconductor device and fabricating method thereof
09/02/2003US6613610 Image display unit and method of producing image display unit
09/02/2003US6613609 Method for producing a portable electronic device with an integrated circuit protected by a photosensitive resin
09/02/2003US6613608 Semiconductor wafer with anisotropic conductor film, and method of manufacture thereof
09/02/2003US6613607 Method for manufacturing encapsulated electronic components, particularly integrated circuits
09/02/2003US6613606 Structure of high performance combo chip and processing method
09/02/2003US6613605 Interconnection method entailing protuberances formed by melting metal over contact areas
09/02/2003US6613603 Photovoltaic device, process for production thereof, and zinc oxide thin film
09/02/2003US6613597 Optical chip packaging via through hole
09/02/2003US6613595 Test structure and method for flash memory tunnel oxide quality
09/02/2003US6613593 Method of fabricating a semiconductor device
09/02/2003US6613592 IMD oxide crack monitor pattern and design rule
09/02/2003US6613590 Yield based, in-line defect sampling method
09/02/2003US6613589 Method for improving substrate alignment
09/02/2003US6613586 Hydrogen barrier encapsulation techniques for the control of hydrogen induced degradation of ferroelectric capacitors in conjunction with multilevel metal processing for non-volatile integrated circuit memory devices
09/02/2003US6613585 Ferroelectric thin film device and method of producing the same
09/02/2003US6613498 Exposure of photoresistive material by transmitting radiation through layer of absorber; development
09/02/2003US6613497 Patterning with x-rays or vacuum ultraviolet radiation; replacement of hydrogen atoms of acrylic polymer, polysiloxane, and polyvinylphenol; alkylation
09/02/2003US6613495 Negative photoimageable mixture of a triazine or oxadiazole type acid generator, a reactive oligomer with crosslinking groups and a resin binder
09/02/2003US6613492 Prepared from acetoxystyrene and either 5-benzofuranonyl (meth)acrylate or 3-hydroxy-4-chromenon-6-yl (meth)acrylate
09/02/2003US6613487 Pre-alignment system of exposure apparatus having wafer cooling means and exposure method using the same
09/02/2003US6613484 Maintaining profile control during etching of dielectrics; depositing photoresist, patterning to form voids, depositing oxidation resistant overlayer capable of depleting etcg chamber
09/02/2003US6613483 Calibration pattern
09/02/2003US6613482 Oxidation resistant covering
09/02/2003US6613461 Gallium nitride-based compound semiconductor chip and method for producing the same, and gallium nitride-based compound semiconductor wafer
09/02/2003US6613449 Chip on films; flexible printed circuit
09/02/2003US6613442 Boron nitride/yttria composite components of semiconductor processing equipment and method of manufacturing thereof
09/02/2003US6613242 Process for treating solid surface and substrate surface
09/02/2003US6613240 Method and apparatus for smoothing thin conductive films by gas cluster ion beam
09/02/2003US6613214 Apparatus for depositing a metal film, comprising a holder that positions the substrate so seed layer contacts an electrolyte solution, and electric contact which contacts second side or edge of substrate; uniform current density
09/02/2003US6613200 Electro-chemical plating with reduced thickness and integration with chemical mechanical polisher into a single platform
09/02/2003US6613189 Apparatus for controlling the temperature of a gas distribution plate in a process reactor
09/02/2003US6613185 Curable silicone elastomer and process of production thereof and method of bonding therewith
09/02/2003US6613180 Method for fabricating semiconductor-mounting body and apparatus for fabricating semiconductor-mounting body
09/02/2003US6613157 Methods for removing particles from microelectronic structures
09/02/2003US6613156 Apparatus includes a transporting unit, a stripping unit, a washing unit, a drying unit and a control unit; stripping organic light-emitting display (OLED)
09/02/2003US6613105 System for filling openings in semiconductor products
09/02/2003US6612917 Abrasive article suitable for modifying a semiconductor wafer
09/02/2003US6612916 Article suitable for chemical mechanical planarization processes
09/02/2003US6612912 Method for fabricating semiconductor device and processing apparatus for processing semiconductor device
09/02/2003US6612911 Alkali metal-containing polishing system and method
09/02/2003US6612903 Workpiece carrier with adjustable pressure zones and barriers
09/02/2003US6612902 Method and apparatus for end point triggering with integrated steering
09/02/2003US6612900 Method and apparatus for wireless transfer of chemical-mechanical planarization measurements
09/02/2003US6612872 Apparatus for forming modular sockets using flexible interconnects and resulting structures
09/02/2003US6612861 Forming reliable semiconductor testing device having high frequency bandwidth
09/02/2003US6612801 Method and device for arraying substrates and processing apparatus thereof
09/02/2003US6612800 Article transfer apparatus