Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
10/2013
10/24/2013US20130277827 Semiconductor Device and Method of Forming Composite Bump-on-Lead Interconnection
10/24/2013US20130277826 Semiconductor device and method of forming bump-on-lead interconnection
10/24/2013US20130277825 Method for Preventing Corrosion of Copper-Aluminum Intermetallic Compounds
10/24/2013US20130277824 Manufacturing Method for Semiconductor Device and Semiconductor Device
10/24/2013US20130277823 Split Loop Cut Pattern For Spacer Process
10/24/2013US20130277822 Interconnect structures for integrated circuits and their formation
10/24/2013US20130277819 Semiconductor device and method of manufacturing semiconductor device
10/24/2013US20130277817 Lead frame, semiconductor package, and manufacturing method of the same
10/24/2013US20130277816 Plastic-packaged semiconductor device having wires with polymerized insulator skin
10/24/2013US20130277815 Method of forming a thin substrate chip scale package device and structure
10/24/2013US20130277814 Method for fixing semiconductor chip on circuit board and structure thereof
10/24/2013US20130277813 Chip package and method of forming the same
10/24/2013US20130277811 Stacked interposer leadframes
10/24/2013US20130277810 Method for forming heat sink with through silicon vias
10/24/2013US20130277809 Method of manufacturing silicon single crystal, silicon single crystal, and wafer
10/24/2013US20130277808 Dipping solution for use in production of siliceous film and process for producing siliceous film using the dipping solution
10/24/2013US20130277805 Semiconductor structure and method of manufacturing the same
10/24/2013US20130277804 Bipolar junction transistors with reduced base-collector junction capacitance
10/24/2013US20130277799 Integrated Circuit Capacitor and Method
10/24/2013US20130277798 Implementing Semiconductor Signal-Capable Capacitors with Deep Trench and TSV Technologies
10/24/2013US20130277797 Coil and Method of Manufacturing a Coil
10/24/2013US20130277795 Farbrication of a localized thick box with planar oxide/soi interface on bulk silicon substrate for silicon photonics integration
10/24/2013US20130277791 Schottky diode with opposite-polarity schottky diode field guard ring
10/24/2013US20130277790 Dual Profile Shallow Trench Isolation Apparatus and System
10/24/2013US20130277778 Magnetoresistive random access memory device and method of making same
10/24/2013US20130277777 MEMS Device Structure and Methods of Forming Same
10/24/2013US20130277771 Capacitive Sensors and Methods for Forming the Same
10/24/2013US20130277770 MEMS Devices and Methods of Forming the Same
10/24/2013US20130277766 Multiple high-k metal gate stacks in a field effect transistor
10/24/2013US20130277765 Semiconductor device including graded gate stack, related method and design structure
10/24/2013US20130277764 Etch Stop Layer Formation In Metal Gate Process
10/24/2013US20130277760 Dummy FinFET Structure and Method of Making Same
10/24/2013US20130277759 Semiconductor Fin Structures and Methods for Forming the Same
10/24/2013US20130277758 Method for Keyhole Repair in Replacement Metal Gate Integration Through the Use of a Printable Dielectric
10/24/2013US20130277753 Bicmos devices on etsoi
10/24/2013US20130277752 Self-aligned contact metallization for reduced contact resistance
10/24/2013US20130277751 Interface-free metal gate stack
10/24/2013US20130277749 Semiconductor device and method of manufacturing the same
10/24/2013US20130277747 Transistor having a stressed body
10/24/2013US20130277746 Integrated circuits having protruding source and drain regions and methods for forming integrated circuits
10/24/2013US20130277742 Semiconductor structure and method for manufacturing the same
10/24/2013US20130277734 Semiconductor device and method for manufacturing same
10/24/2013US20130277731 Apparatuses and methods of forming apparatuses using a partial deck-by-deck process flow
10/24/2013US20130277730 Semiconductor device and method of manufacturing the same
10/24/2013US20130277729 Floating gate transistor memory with an organic semiconductor interlayer
10/24/2013US20130277728 Semiconductor chip and fabricating method thereof
10/24/2013US20130277726 Semiconductor device and method of manufacturing the same
10/24/2013US20130277723 DRAM Cells and Methods of Forming Silicon Dioxide
10/24/2013US20130277721 Methods for designing semiconductor device structures and related semiconductor structures including damascene structures
10/24/2013US20130277719 Gate Electrodes with Notches and Methods for Forming the Same
10/24/2013US20130277718 Jfet device and method of manufacturing the same
10/24/2013US20130277712 Semiconductor ESD Device and Method of Making Same
10/24/2013US20130277710 Semiconductor component and method for producing it
10/24/2013US20130277709 Display device
10/24/2013US20130277685 Soi transistors with improved source/drain structures with enhanced strain
10/24/2013US20130277684 Nitride semiconductor structure, nitride semiconductor light emitting element, nitride semiconductor transistor element, method of manufacturing nitride semiconductor structure, and method of manufacturing nitride semiconductor element
10/24/2013US20130277680 High Speed Gallium Nitride Transistor Devices
10/24/2013US20130277679 Semiconductor device and manufacturing method thereof
10/24/2013US20130277675 Soi wafer, manufacturing method therefor, and mems device
10/24/2013US20130277674 Display panel
10/24/2013US20130277666 Thin film transistor, thin film transistor array panel, and method of manufacturing a thin film transistor array panel
10/24/2013US20130277636 Variable resistance memory device and method for fabricating the same
10/24/2013US20130277357 Work heating device and work treatment device
10/24/2013US20130277268 Front opening wafer container with door deflection minimization
10/24/2013US20130277206 Epitaxial film forming method, sputtering apparatus, manufacturing method of semiconductor light-emitting element, semiconductor light-emitting element, and illumination device
10/24/2013US20130276989 Paste applying apparatus and paste applying method, and die bonder
10/24/2013US20130276985 Methods of Processing Semiconductor Substrates, Electrostatic Carriers for Retaining Substrates for Processing, and Assemblies Comprising Electrostatic Carriers Having Substrates Electrostatically Bonded Thereto
10/24/2013US20130276983 Injection member for manufacturing semiconductor device and plasma processing apparatus having the same
10/24/2013US20130276982 Substrate processing apparatus and electrode structure
10/24/2013US20130276979 Retaining ring for chemical mechanical polishing
10/24/2013US20130276824 Process for cleaning a compound semiconductor wafer
10/24/2013US20130276821 Method and System for Distributing Gas for A Bevel Edge Etcher
10/24/2013US20130276695 Susceptor assemblies for supporting wafers in a reactor apparatus
10/24/2013DE19843984B4 Verfahren zur Herstellung von Strahlungssensoren A process for the production of radiation sensors
10/24/2013DE112012000501T5 Verfahren zur Herstellung eines rückwärts sperrenden Halbleiterelements A process for the preparation of a reverse-blocking semiconductor element
10/24/2013DE112012000272T5 Verfahren zum Ermöglichen des Verfahrens und Erweitern des Verfahrensfensters zum Bilden von Silicid, Germanid oder Germanosilicid in Strukturen mit extrem kleinen Abmessungen A method for facilitating the process and expand the process window for forming silicide germanide or Germanosilicid in structures with extremely small dimensions
10/24/2013DE112011104672T5 Verfahren zum Verhindern einer Programmierungsstörung eines Flash-Speichers A method of preventing program disturb of a flash memory
10/24/2013DE112011104408T5 Halbleitervorrichtungen mit rückseitiger Isolierung Semiconductor devices with rear insulation
10/24/2013DE112011103350T9 Chemisch-Mechanische Planarisierungsprozesse zum Herstellen von Finfet-Einheiten Chemical-mechanical planarization processes for producing FinFET devices
10/24/2013DE102013207326A1 Hoch-Dichte-3D-Paket High-density 3D package
10/24/2013DE102013206899A1 Verfahren zur Herstellung einer Leiterbahn A method of fabricating a wiring
10/24/2013DE102013202807A1 Halbleitervorrichtung und Verfahren zum Herstellen einer Halbleitervorrichtung A semiconductor device and method of manufacturing a semiconductor device
10/24/2013DE102013104058A1 Spule und Verfahren zur Herstellung einer Spule Coil and method of fabricating a coil
10/24/2013DE102013104048A1 Verfahren zum Ausbilden von Halbleiterbauelementen A method of forming semiconductor devices
10/24/2013DE102013103920A1 Herstellungsverfahren für Halbleiterbauelement und Halbleiterbauelement A method for manufacturing semiconductor device and semiconductor device
10/24/2013DE102013103860A1 Chipgehäuse und Verfahren zum Bilden desselben The same chip package and method of forming
10/24/2013DE102013007215A1 Leistungsvorrichtung und Herstellungsverfahren hierfür Power device and manufacturing method thereof
10/24/2013DE102012214077A1 Integrierte Schaltungen mit abstehenden Source- und Drainbereichen und Verfahren zum Bilden integrierter Schaltungen Integrated circuits having projecting source and drain regions and methods of forming integrated circuits
10/24/2013DE102012206732A1 Verfahren zum Herstellen eines hybrid integrierten Bauteils A method for manufacturing a hybrid integrated component
10/24/2013DE102012206708A1 Method for polishing semiconductor wafer, involves providing functional layer of polishing cloth with pores and small blind holes which are arranged in radially inward region and radially outward region
10/24/2013DE102012206647A1 Measuring device i.e. thermal flow rate measuring device, for measuring flow rate of fluid in automation technology, has solder uniformly distributed in recess so that defined distance between housing and thermistor component is adjusted
10/24/2013DE102012206407A1 Druckkontaktanordnung und verfahren zur herstellung einer druckkontaktanordnung Pressure contact arrangement and method for manufacturing a pressure-contact arrangement
10/24/2013DE102012206405A1 Verfahren zur Erzielung erhöhter Bauteilzuverlässigkeit eines Halbleiterbauelements durch Bereitstellen günstigerer Prozessbedingungen beim Aufwachsen einer Schicht mit großem ε Method of achieving increased component reliability of a semiconductor device by providing favorable process conditions during the growth of a layer with large ε
10/24/2013DE102012206362A1 Schaltungsanordnung zur thermisch leitfähigen Chipmontage und Herstellungsverfahren Circuit arrangement for thermally conductive die attach and manufacturing processes
10/24/2013DE102012107760A1 Verfahren und Bauelement für Lötverbindungen Method and device for solder
10/24/2013DE102012103578A1 Method of manufacturing thin film solar cell, involves depositing transparent conductive oxide layer as front contact on protective layer by pulsed magnetron sputtering with specific pulse frequency and power density during a pulse
10/24/2013DE102012018611B3 Semiconductor component i.e. field effect-controlled semiconductor component, has circulating lateral diffusion barrier whose trench is cut through insulation region and divided into cell area and edge insulation region
10/24/2013DE102012008251A1 Verspanntes Bauelement und Verfahren zur Herstellung Strained component and methods for making
10/24/2013DE102012007815A1 Diamond coated saw wire for wire saw that is utilized for cutting hard-brittle materials into thin disks for manufacturing silicon wafers of semiconductor, has carbon fiber bundle embedded in hollow wire that is made of steel
10/24/2013DE102012007727A1 Solid-state LED lamp assembly used in street lighting, has crossbar that is projected beyond side face of respective solid state LED and is partially connected with side face of solid state LED