Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
10/2013
10/17/2013US20130273718 Tape for processing wafer, method for manufacturing tape for processing wafer, and method for manufacturing semiconductor device
10/17/2013US20130273717 Apparatus and Method for the Singulation of a Semiconductor Wafer
10/17/2013US20130273716 Method of dicing substrate
10/17/2013US20130273715 Silicon-on-insulator substrate with built-in substrate junction
10/17/2013US20130273714 Method for preparing semiconductor substrate with insulating buried layer by gettering process
10/17/2013US20130273713 Process for the transfer of a thin film comprising an inclusion creation step
10/17/2013US20130273712 Process for fabricating a silicon-on-insulator structure employing two rapid thermal annealing processes, and related structures
10/17/2013US20130273711 Method of forming a finfet device
10/17/2013US20130273710 Substrate fins with different heights
10/17/2013US20130273709 Methods of recessing an active region and sti structures in a common etch process
10/17/2013US20130273706 Method for forming semiconductor device
10/17/2013US20130273704 Methods of forming a polysilicon layer and methods of manufacturing semiconductor devices
10/17/2013US20130273702 Integration Flow For LDD And Spacer Fabrication On A Sacrificial Amorphous Carbon Gate Structure
10/17/2013US20130273701 Semiconductor device fabrication method
10/17/2013US20130273700 Fabricating 3d non-volatile storage with transistor decoding structure
10/17/2013US20130273699 Mos having a sic/sige alloy stack
10/17/2013US20130273698 Methods for Forming Through Vias
10/17/2013US20130273697 Fabrication method of a mixed alloy lead frame for packaging power semiconductor devices
10/17/2013US20130273696 Semiconductor device and manufacturing method thereof
10/17/2013US20130273695 Selective transfer of active components
10/17/2013US20130273694 Integrated Thermal Solutions for Packaging Integrated Circuits
10/17/2013US20130273692 Leadless array plastic package with various ic packaging configurations
10/17/2013US20130273691 Apparatus and method for thin die-to-wafer bonding
10/17/2013US20130273686 Image Sensor Manufacturing Methods
10/17/2013US20130273674 Apparatus and Method for Endpoint Detection During Electronic Sample Preparation
10/17/2013US20130273673 Method for forming light-emitting device
10/17/2013US20130273672 Semiconductor substrate for an optical transmitter apparatus and method
10/17/2013US20130273671 Apparatus and Method for Endpoint Detection During Electronic Sample Preparation
10/17/2013US20130273669 Method for improving Uniformity of Chemical-Mechanical Planarization Process
10/17/2013US20130273477 Guide apparatus, exposure apparatus, and method of manufacturing article
10/17/2013US20130273361 Active Energy Ray-Curable Pressure-Sensitive Adhesive for Re-Release and Dicing Die-Bonding Film
10/17/2013US20130272951 Method of manufacturing graphene substrate, and graphene substrate
10/17/2013US20130272837 Semiconductor die pick-up apparatus and method of picking up semiconductor die using the same
10/17/2013US20130272825 Apparatus and method for determining the location of plate elements of a wafer boat
10/17/2013US20130272824 Substrate transfer device, substrate transfer method, and storage medium
10/17/2013US20130272823 Robot systems, apparatus, and methods having independently rotatable waists
10/17/2013US20130272822 Transfer robot
10/17/2013US20130272686 Substrate heat treatment apparatus
10/17/2013US20130272027 Method for Manufacturing LED Light Bar and LED Light Bar and Backlight Module
10/17/2013US20130271945 Polarization-modulating element, illumination optical apparatus, exposure apparatus, and exposure method
10/17/2013US20130271739 Exposure apparatus and device manufacturing method
10/17/2013US20130270756 Retaining system for retaining and holding a wafer
10/17/2013US20130270744 System and method for removing coating from an edge of a substrate
10/17/2013US20130270721 Enhanced package thermal management using external and internal capacitive thermal material
10/17/2013US20130270717 Semiconductor package and method of fabricating the same
10/17/2013US20130270716 Semiconductor device and method of manufacturing the same
10/17/2013US20130270714 Contact structure and manufacturing method thereof
10/17/2013US20130270713 Dual damascene structure having through silicon via and manufacturing method thereof
10/17/2013US20130270712 Through silicon via structure and method of fabricating the same
10/17/2013US20130270711 Apparatus and method for integration of through substrate vias
10/17/2013US20130270709 Non-bridging contact via structures in proximity
10/17/2013US20130270708 Method for forming buried conductive line and structure of buried conductive line
10/17/2013US20130270707 Semiconductor device, method of manufacturing semiconductor device, and electronic apparatus
10/17/2013US20130270705 Semiconductor Device Packages and Methods
10/17/2013US20130270704 Semiconductor Device with Self-Aligned Interconnects
10/17/2013US20130270703 Electroless filled conductive structures
10/17/2013US20130270702 Copper interconnect structure and method for forming the same
10/17/2013US20130270701 System and methods for wire bonding
10/17/2013US20130270700 Package on package structures and methods for forming the same
10/17/2013US20130270698 Strain reduced structure for ic packaging
10/17/2013US20130270694 Substrates having bumps with holes, semiconductor chips having bumps with holes, semiconductor packages formed using the same, and methods of fabricating the same
10/17/2013US20130270692 Method for Creating Semiconductor Junctions with Reduced Contact Resistance
10/17/2013US20130270691 Package for a microelectronic die, microelectronic assembly containing same, microelectronic system, and method of reducing die stress in a microelectronic package
10/17/2013US20130270690 Methods for Forming Silicon-Based Hermetic Thermal Solutions
10/17/2013US20130270686 Methods and apparatus for heat spreader on silicon
10/17/2013US20130270683 Semiconductor packages with heat dissipation structures and related methods
10/17/2013US20130270682 Methods and Apparatus for Package on Package Devices with Reversed Stud Bump Through Via Interconnections
10/17/2013US20130270678 Integrated circuit including thermal gate, related method and design structure
10/17/2013US20130270671 Capacitor Array Layout Arrangement for High Matching Methodology
10/17/2013US20130270655 Semiconductor devices having fin structures, and methods of forming semiconductor devices having fin structures
10/17/2013US20130270650 Resistor and manufacturing method thereof
10/17/2013US20130270648 Semiconductor devices with self-aligned source drain contacts and methods for making the same
10/17/2013US20130270647 Structure and method for nfet with high k metal gate
10/17/2013US20130270646 Integrated circuits having improved metal gate structures and methods for fabricating same
10/17/2013US20130270645 Workfunction metal stacks for a final metal gate
10/17/2013US20130270644 Replacement gate structures and methods of manufacturing
10/17/2013US20130270641 Methods of forming finfet semiconductor devices so as to tune the threshold voltage of such devices
10/17/2013US20130270638 Strained soi finfet on epitaxially grown box
10/17/2013US20130270635 Semiconductor Device with False Drain
10/17/2013US20130270634 High voltage device and manufacturing method thereof
10/17/2013US20130270628 Replacement Channels
10/17/2013US20130270627 FinFET NON-VOLATILE MEMORY AND METHOD OF FABRICATION
10/17/2013US20130270621 Nonvolatile semiconductor storage device and fabrication method thereof
10/17/2013US20130270620 Structure and method for finfet integrated with capacitor
10/17/2013US20130270614 Formation of a trench silicide
10/17/2013US20130270613 Method of trimming spacers and semiconductor structure thereof
10/17/2013US20130270612 Non-Planar FET and Manufacturing Method Thereof
10/17/2013US20130270611 Semiconductor structure having a source and a drain with reverse facets
10/17/2013US20130270608 Heterogeneous integration of group iii nitride on silicon for advanced integrated circuits
10/17/2013US20130270607 Semiconductor Device Channel System and Method
10/17/2013US20130270606 Semiconductor Device with Integrated Breakdown Protection
10/17/2013US20130270600 Functionalization of a Substrate
10/17/2013US20130270583 Method of forming copper wiring and method of manufacturing display device
10/17/2013US20130270578 Semiconductor device with heat removal structure and related production method
10/17/2013US20130270575 Semiconductor wafer comprising gallium nitride layer having one or more silicon nitride interlayer therein
10/17/2013US20130270574 Nitride-based semiconductor element and method for fabricating the same
10/17/2013US20130270572 Group iii-n hfet with a graded barrier layer
10/17/2013US20130270571 Schottky barrier diode and manufacturing method thereof
10/17/2013US20130270570 Method of manufacturing thin film transistor
10/17/2013US20130270560 Method for forming semiconductor device with epitaxy source and drain regions independent of patterning and loading