Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
10/2013
10/31/2013US20130285223 Method for manufacturing electronic devices
10/31/2013US20130285222 Semiconductor package and method of manufacturing the same
10/31/2013US20130285220 Vertically packaged integrated circuit
10/31/2013US20130285217 Substrate treating method, temporary fixing composition and semiconductor device
10/31/2013US20130285215 Stacked wafer structure and method for stacking a wafer
10/31/2013US20130285211 Device structures compatible with fin-type field-effect transistor technologies
10/31/2013US20130285208 Finfet diode with increased junction area
10/31/2013US20130285206 Low leakage mim capacitor
10/31/2013US20130285203 Semiconductor integrated circuit device and method for manufacturing the same
10/31/2013US20130285201 Mim capacitor formation method and structure
10/31/2013US20130285200 Capacitor for Interposers and Methods of Manufacture Thereof
10/31/2013US20130285199 Semiconductor Device and Method for Making the Same
10/31/2013US20130285197 Semiconductor Devices and Methods of Manufacturing and Using Thereof
10/31/2013US20130285193 Metal-insulator-metal (mim) capacitor with deep trench (dt) structure and method in a silicon-on-insulator (soi)
10/31/2013US20130285192 Low noise memory array
10/31/2013US20130285162 Integrated getter area for wafer level encapsulated microelectromechanical systems
10/31/2013US20130285158 Semiconductor device and manufacturing method thereof
10/31/2013US20130285154 CMOS Transistor With Dual High-k Gate Dielectric
10/31/2013US20130285153 Strained structure of semiconductor device and method of making the strained structure
10/31/2013US20130285152 Finfet with enhanced embedded stressor
10/31/2013US20130285151 Device and methods for high-k and metal gate stacks
10/31/2013US20130285150 Device and methods for high-k and metal gate stacks
10/31/2013US20130285142 Narrow body field-effect transistor structures with free-standing extension regions
10/31/2013US20130285141 Multi-Gate Devices with Replaced-Channels and Methods for Forming the Same
10/31/2013US20130285138 Method of Fabricating Tunnel Transistors With Abrupt Junctions
10/31/2013US20130285136 Schottky diode with enhanced breakdown voltage
10/31/2013US20130285134 Non-volatile memory device formed with etch stop layer in shallow trench isolation region
10/31/2013US20130285133 Non-volatile memory device formed by dual floating gate deposit
10/31/2013US20130285126 Narrow body field-effect transistor structures with free-standing extension regions
10/31/2013US20130285123 Transistor with improved sigma-shaped embedded stressor and method of formation
10/31/2013US20130285120 Bipolar transistor having collector with grading
10/31/2013US20130285119 PSEUDOMORPHIC HIGH ELECTRON MOBILITY TRANSISTOR (pHEMT) COMPRISING LOW TEMPERATURE BUFFER LAYER
10/31/2013US20130285117 CMOS WITH SiGe CHANNEL PFETs AND METHOD OF FABRICATION
10/31/2013US20130285112 High-trigger current scr
10/31/2013US20130285111 Diode-triggered silicon controlled rectifier with an integrated diode
10/31/2013US20130285110 Select devices including an open volume, and related methods, memory devices, and electronic systems
10/31/2013US20130285078 Semiconductor device having display device
10/31/2013US20130285070 Silicon carbide semiconductor device and method of manufacturing the same
10/31/2013US20130285065 Pvd buffer layers for led fabrication
10/31/2013US20130285063 Thin-film transistor array substrate and manufacturing method thereof
10/31/2013US20130285061 Semiconductor devices and methods of preparation
10/31/2013US20130285060 Unit for liquid phase epitaxial growth of monocrystalline silicon carbide, and method for liquid phase epitaxial growth of monocrystalline silicon carbide
10/31/2013US20130285056 Semiconductor structure with low-melting-temperature conductive regions, and method of repairing a semiconductor structure
10/31/2013US20130285053 Sputtering Target for Oxide Thin Film and Process for Producing the Sputtering Target
10/31/2013US20130285048 Enhanced electron mobility at the interface between gd2o3(100)/n-si(100)
10/31/2013US20130285014 Formation of a graphene layer on a large substrate
10/31/2013US20130285013 Compound semiconductor devices and methods of fabricating the same
10/31/2013US20130285007 Silicon nanocrystal inks, films, and methods
10/31/2013US20130285001 Methods for forming a nanowire and apparatus thereof
10/31/2013US20130284709 Electrostatic chuck having reduced power loss
10/31/2013US20130284683 Wafer boat
10/31/2013US20130284375 Consumable part for use in a plasma processing apparatus
10/31/2013US20130284371 Capacitive coupling plasma processing apparatus and method for using the same
10/31/2013US20130284256 Lead-free conductive paste composition and semiconductor devices made therewith
10/31/2013US20130284217 Substrate Cleaning System Using Stabilized Fluid Solutions
10/31/2013US20130284215 Methods and apparatus for isolating a running beam conveyor from a semiconductor substrate cleaning environment
10/31/2013US20130284213 Substrate processing apparatus and substrate processing method
10/31/2013US20130284096 Cooled reflective adapter plate for a deposition chamber
10/31/2013US20130284095 Optics for controlling light transmitted through a conical quartz dome
10/31/2013US20130284091 Method For Improving Performance Of A Substrate Carrier
10/31/2013US20130283579 Assembly device for semiconductors
10/31/2013DE112012000689T5 Gate-Dielektrikum aus Nitrid für Graphen-Mosfet Gate dielectric of nitride for graphs Mosfet
10/31/2013DE112012000615T5 SiC-Bipolartransistor mit überwachsenem Emitter SiC bipolar emitter overgrown
10/31/2013DE112011104775T5 Verfahren zur Herstellung eines Schottky-n-Kanal-Feldeffekttransistors auf Germaniumbasis A process for producing a Schottky n-channel field-effect transistor based on germanium
10/31/2013DE102013207613A1 Ein pseudomorphischer Transistor mit hoher Elektromobilität (pHEMT), welcher eine Niedrig-Temperatur Pufferschicht aufweist A pseudomorphischer transistor with high electric mobility (pHEMT), which has a low-temperature buffer layer
10/31/2013DE102013104223A1 Halbleiter-Bauelemente und Verfahren zu deren Herstellung und Verwendung Semiconductor devices and methods for their preparation and use
10/31/2013DE102013103976A1 Halbleiterbauelement mit selbstausgerichteten Verbindungen und Sperrabschnitten A semiconductor device with self-aligned connections, and locking portions
10/31/2013DE102013102908A1 Verfahren zum Herstellen einer Halbleiter-Vorrichtung A method of manufacturing a semiconductor device
10/31/2013DE102013102545A1 Verfahren zum Behandeln von zumindest einem Substrat in einem flüssigen Medium A method of treating at least one substrate in a liquid medium
10/31/2013DE102013100904A1 FET e.g. planar FET, for use in memory cell of microprocessor, has crystalline silicon substrate comprising surface, and source or drain regions formed on surface, which surrounds channel portion along length of channel portion
10/31/2013DE102013006584A1 Laserausheil- bzw. Annealing-Scan-Verfahren mit reduzierten Ausheil- bzw. Annealing-Ungleichförmigkeiten Laserausheil- or annealing scan method with reduced annealing or annealing non-uniformities
10/31/2013DE102012215988A1 CET und GATE-Leckstromverringerung in Metall-GATE-Elektrodenstrukturen mit grossem ε durch Wärmebehandlung und nach Entfernung der Diffusionsschicht CET and gate leakage current reduction in metal gate electrode structures with large ε by heat treatment and after removal of the diffusion layer
10/31/2013DE102012207121A1 Device, useful for ultrasound bonding of transducer for transmission of ultrasound to tool by surface coupling, where tool is connected to outer surface of transducer on planar/partly curved coupling surface or opening on coupling surface
10/31/2013DE102012206875A1 Verfahren zum Herstellen eines hybrid integrierten Bauteils A method for manufacturing a hybrid integrated component
10/31/2013DE102012107899A1 Wafer assembly for use during manufacturing integrated switching circuits, has integrated circuits formed on process and carrier wafers bonded to process wafer, and adhesive layer bonding wafers, where carrier wafer includes alignment mark
10/31/2013DE102012103686A1 Epitaxiesubstrat, Verfahren zur Herstellung eines Epitaxiesubstrats und optoelektronischer Halbleiterchip mit einem Epitaxiesubstrat Epitaxial substrate, methods of manufacturing an epitaxial substrate and opto-electronic semiconductor chip having an epitaxial substrate
10/31/2013DE102011056412B4 Hochvolttransistorbauelement und Herstellungsverfahren High-voltage transistor device and manufacturing method
10/31/2013DE102010040918B4 Behälter zum Stapeln und Transportieren von Scheiben aus brüchigem Material A container for stacking and transporting of disks made of brittle material
10/31/2013DE102008037653B4 Verfahren zur Herstellung von Wafern und Blockhalter A process for the production of wafers and pad holder
10/31/2013DE102007032636B4 Verfahren zur Herstellung einer dielektrischen Schicht für ein elektronisches Bauelement A process for producing a dielectric layer for an electronic component
10/31/2013DE102006062037B4 Verfahren zum Steuern eines elektrochemischen Ätzprozesses und System mit einer elektrochemischen Ätzanlage A method for controlling an electrochemical etching process and system with an electrochemical etch tool
10/30/2013EP2657974A1 Semiconductor device and display device
10/30/2013EP2657964A2 Electronic component and electronic apparatus
10/30/2013EP2657963A2 Wafer-adhesive-support composite, wafer support with adhesive layer for processing wafer, adhesive layer for use in temporarily supporting wafer during processing, and method of manufacturing a thin wafer
10/30/2013EP2657962A1 Electronic device with a metallisation layer having a high- and a low-melting-point component diffusion-bonded together and a synthetic resin layer covering the metallisation layer
10/30/2013EP2657961A1 Method of production of a field effect transistor with local source/drain insulation
10/30/2013EP2657960A1 Field-effect transistor, process for producing the same, and electronic device including the same
10/30/2013EP2657959A1 Process for manufacture of silicon carbide semiconductor device
10/30/2013EP2657958A1 Method of manufacturing semiconductor device
10/30/2013EP2657956A1 Method for treating the surface condition of a silicon substrate
10/30/2013EP2657955A1 Method for manufacturing soi wafer
10/30/2013EP2657954A1 Organic semiconductor materials, preparation methods and applications thereof
10/30/2013EP2657768A2 Optically semitransmissive film, photomask blank and photomask, and method for designing optically semitransmissive film
10/30/2013EP2657365A2 Method for removal of carbon from an organosilicate material
10/30/2013EP2657363A1 Method of depositing silicon dioxide films
10/30/2013EP2657240A1 Silicon compound, silicon-containing compound, composition for forming resits underlayer film containing the same and patterning process
10/30/2013EP2657004A1 Method for manufacturing microscopic structural body
10/30/2013EP2656393A1 Contact resistance reduction employing germanium overlayer pre-contact metalization
10/30/2013EP2656392A2 Transistors with high concentration of boron doped germanium
10/30/2013EP2656391A2 Column iv transistors for pmos integration
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