Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
10/2013
10/31/2013WO2012123649A8 Mechanically stable device based on nano/micro wires and having improved optical properties and process for producing it
10/31/2013WO2012044622A3 Low-temperature dielectric film formation by chemical vapor deposition
10/31/2013US20130288573 Polishing Composition and Polishing Method Using The Same
10/31/2013US20130288572 Linear Prediction For Filtering Of Data During In-Situ Monitoring Of Polishing
10/31/2013US20130288489 Method and Apparatus to Fabricate Vias in Substrates for Gallium Nitride MMICs
10/31/2013US20130288488 Ozone plenum as uv shutter or tunable uv filter for cleaning semiconductor substrates
10/31/2013US20130288487 Method and system for controlling a spike anneal process
10/31/2013US20130288486 Method of depositing silicone dioxide films
10/31/2013US20130288485 Densification for flowable films
10/31/2013US20130288484 Use of surfactants having at least three short-chain perfluorinated groups rf for manufacturing integrated circuits having patterns with line-space dimensions below 50 nm
10/31/2013US20130288483 Methods and apparatus for controlling substrate uniformity
10/31/2013US20130288482 Methods of forming a pattern
10/31/2013US20130288481 Device and Method for Stopping Etching Process
10/31/2013US20130288480 Method of epitaxial germanium tin alloy surface preparation
10/31/2013US20130288479 Combination, Method, and Composition for Chemical Mechanical Planarization of a Tungsten-Containing Substrate
10/31/2013US20130288478 Highly dilutable polishing concentrates and slurries
10/31/2013US20130288477 Apparatus and method for depositing a layer onto a substrate
10/31/2013US20130288474 Methods for fabricating dual damascene interconnect structures
10/31/2013US20130288471 Methods of forming self-aligned contacts for a semiconductor device
10/31/2013US20130288470 Impurity diffusion method, substrate processing apparatus, and method of manufacturing semiconductor device
10/31/2013US20130288469 Methods and apparatus for implanting a dopant material
10/31/2013US20130288468 Methods of forming self-aligned contacts for a semiconductor device formed using replacement gate techniques
10/31/2013US20130288467 Method of manufacturing semiconductor device
10/31/2013US20130288466 Methods of Forming Doped Regions in Semiconductor Substrates
10/31/2013US20130288465 Methods for filling high aspect ratio features on substrates
10/31/2013US20130288464 Method for making eptaxial structure
10/31/2013US20130288463 Method for producing thin layers of crystalline or polycrystalline materials
10/31/2013US20130288461 Metal-Oxide-Semiconductor High Electron Mobility Transistors and Methods of Fabrication
10/31/2013US20130288460 Process chamber having separate process gas and purge gas regions
10/31/2013US20130288459 Method for making epitaxial structure
10/31/2013US20130288458 Method for making epitaxial structure
10/31/2013US20130288457 Method for making epitaxial structure
10/31/2013US20130288456 Semiconductor device and fabricating method thereof
10/31/2013US20130288455 Method of forming a freestanding semiconductor wafer
10/31/2013US20130288454 Method for separating a product substrate from a carrier substrate
10/31/2013US20130288453 Method of manufacturing laminated wafer by high temperature laminating method
10/31/2013US20130288452 Corner transistor suppression
10/31/2013US20130288451 Soi device with dti and sti
10/31/2013US20130288450 Shallow trench forming method
10/31/2013US20130288449 Semiconductor diode and method of manufacture
10/31/2013US20130288448 Semiconductor process
10/31/2013US20130288441 Method for forming impurity region of vertical transistor and method for fabricating vertical transistor using the same
10/31/2013US20130288440 Minimizing leakage current and junction capacitance in cmos transistors by utilizing dielectric spacers
10/31/2013US20130288439 Zener Diode Structure and Process
10/31/2013US20130288437 Semiconductor device and semiconductor device manufacturing method
10/31/2013US20130288436 Aqueous Cleaning Techniques and Compositions for use in Semiconductor Device Manufacturing
10/31/2013US20130288435 Cet and gate current leakage reduction in high-k metal gate electrode structures by heat treatment after diffusion layer removal
10/31/2013US20130288433 High density chip packages, methods of forming, and systems including same
10/31/2013US20130288432 Method of manufacturing leadless integrated circuit packages having electrically routed contacts
10/31/2013US20130288431 Package substrates, semiconductor packages having the same, and methods of fabricating the semiconductor packages
10/31/2013US20130288430 Semiconductor device and method for manufacturing thereof
10/31/2013US20130288428 Method for producing semiconductor device
10/31/2013US20130288427 Methods Of Fabricating Dielectric Films From Metal Amidinate Precursors
10/31/2013US20130288417 Semiconductor devices having nanochannels confined by nanometer-spaced electrodes
10/31/2013US20130288403 Systems and methods of automatically detecting failure patterns for semiconductor wafer fabrication processes
10/31/2013US20130288401 Method for fabricating semiconductor device
10/31/2013US20130288400 System and Method for Aligning Substrates for Multiple Implants
10/31/2013US20130288399 Energy beam processing apparatus and energy beam processing method
10/31/2013US20130288045 Method for manufacturing a low-k layer
10/31/2013US20130287536 Wafer edge measurement and control
10/31/2013US20130287529 Method and apparatus for independent wafer handling
10/31/2013US20130287528 Methods and apparatus for large diameter wafer handling
10/31/2013US20130287527 Vacuum treatment apparatus and a method for manufacturing
10/31/2013US20130287526 System architecture for vacuum processing
10/31/2013US20130287377 Direct current lamp driver for substrate processing
10/31/2013US20130287376 Heater block and heat treatment apparatus having the same
10/31/2013US20130286728 Nonvolatile memory cell operating by increasing order in polycrystalline semiconductor material
10/31/2013US20130286634 Method for manufacturing optoelectronic devices
10/31/2013US20130286615 Printed circuit board and method of manufacturing printed circuit board
10/31/2013US20130286614 Composite wafer including a molded wafer and a second wafer
10/31/2013US20130286532 Semiconductor manufacturing apparatus member
10/31/2013US20130286531 Electrostatic chuck
10/31/2013US20130286516 Gate dielectric protection
10/31/2013US20130286372 Exposure Device, Exposure Method and Method of Manufacturing Semiconductor Device
10/31/2013US20130286300 Liquid Crystal Display Device and Method for Manufacturing the Same
10/31/2013US20130286097 Forming A Funnel-Shaped Nozzle
10/31/2013US20130285754 Through silicon via-based oscillator wafer-level-package structure and method for fabricating the same
10/31/2013US20130285694 Through-silicon-via with sacrificial dielectric line
10/31/2013US20130285692 Test socket including electrode supporting portion and method of manufacturing test socket
10/31/2013US20130285336 Alumina sintered body, member including the same, and semiconductor manufacturing apparatus
10/31/2013US20130285264 Wafer assembly with carrier wafer
10/31/2013US20130285263 Sensor array package
10/31/2013US20130285259 Method and system for wafer and strip level batch die attach assembly
10/31/2013US20130285256 Method and an apparatus for forming electrically conductive vias in a substrate, an automated robot-based manufacturing system, a component comprising a substrate with via holes, and an interposer device
10/31/2013US20130285253 Semiconductor device and method of manufacturing the same
10/31/2013US20130285251 Elongated via structures
10/31/2013US20130285248 Package Structure and Substrate Bonding Method
10/31/2013US20130285247 Semiconductor device and production method of the same
10/31/2013US20130285246 Semiconductor Device With Self-Aligned Interconnects and Blocking Portions
10/31/2013US20130285245 Microstructure modification in copper interconnect structures
10/31/2013US20130285244 Through Silicon Via with Embedded Barrier Pad
10/31/2013US20130285243 Easily assembled chip assembly and chip assembling method
10/31/2013US20130285241 Apparatus For Dicing Interposer Assembly
10/31/2013US20130285240 Sensor array package
10/31/2013US20130285239 Chip assembly and chip assembling method
10/31/2013US20130285238 Stud bump structure for semiconductor package assemblies
10/31/2013US20130285237 Low Profile Interposer with Stud Structure
10/31/2013US20130285236 Semiconductor Device and Method of Forming a Thin Wafer Without a Carrier
10/31/2013US20130285233 Thermal management of integrated circuits using phase change material and heat spreaders
10/31/2013US20130285228 Glass Frit Wafer Bond Protective Structure
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