Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
10/2013
10/22/2013US8563412 Method of fabricating semiconductor device
10/22/2013US8563411 Semiconductor devices having a diffusion barrier layer and methods of manufacturing the same
10/22/2013US8563410 End-cut first approach for critical dimension control
10/22/2013US8563409 Film-forming composition
10/22/2013US8563408 Spin-on formulation and method for stripping an ion implanted photoresist
10/22/2013US8563407 Dual sided workpiece handling
10/22/2013US8563406 Semiconductor substrate, semiconductor device, and manufacturing methods for them
10/22/2013US8563405 Method for manufacturing semiconductor device
10/22/2013US8563404 Process for dividing wafer into individual chips and semiconductor chips
10/22/2013US8563403 Three dimensional integrated circuit integration using alignment via/dielectric bonding first and through via formation last
10/22/2013US8563402 Method and structure for fabricating solar cells using a thick layer transfer process
10/22/2013US8563401 Method for fabricating SOI substrate
10/22/2013US8563400 Laser bonding for stacking semiconductor substrates
10/22/2013US8563399 Detachable substrate and processes for fabricating and detaching such a substrate
10/22/2013US8563398 Electrically conductive path forming below barrier oxide layer and integrated circuit
10/22/2013US8563397 Semiconductor device and manufacturing method thereof
10/22/2013US8563396 3D integration method using SOI substrates and structures produced thereby
10/22/2013US8563395 Method of growing uniform semiconductor nanowires without foreign metal catalyst and devices thereof
10/22/2013US8563394 Integrated circuit structure having substantially planar N-P step height and methods of forming
10/22/2013US8563392 Method of forming an ALD material
10/22/2013US8563391 Method for forming MIM capacitor in a copper damascene interconnect
10/22/2013US8563390 Semiconductor devices and methods of fabricating the same
10/22/2013US8563389 Integrated circuit having silicon resistor and method of forming the same
10/22/2013US8563388 Method for producing a plurality of integrated semiconductor components
10/22/2013US8563387 Transistor and method of manufacturing a transistor
10/22/2013US8563386 Integrated circuit system with bandgap material and method of manufacture thereof
10/22/2013US8563385 Field effect transistor device with raised active regions
10/22/2013US8563384 Source/drain extension control for advanced transistors
10/22/2013US8563383 Method of manufacturing a semiconductor device
10/22/2013US8563382 Semiconductor device
10/22/2013US8563381 Method for manufacturing a power semiconductor device
10/22/2013US8563380 Electric nanodevice and method of manufacturing same
10/22/2013US8563379 Semiconductor device and production method thereof
10/22/2013US8563378 Manufacturing semiconductor devices
10/22/2013US8563377 Trench-based power semiconductor devices with increased breakdown voltage characteristics
10/22/2013US8563376 Hybrid CMOS nanowire mesh device and bulk CMOS device
10/22/2013US8563374 Strained semiconductor devices having asymmetrical heterojunction structures and methods for the fabrication thereof
10/22/2013US8563373 Semiconductor device having vertical channels and method of manufacturing the same
10/22/2013US8563372 Methods of forming contact structures including alternating metal and silicon layers and related devices
10/22/2013US8563371 Method of forming semiconductor device
10/22/2013US8563370 Method for fabricating surrounding-gate silicon nanowire transistor with air sidewalls
10/22/2013US8563369 CMOS with channel P-FinFET and channel N-FinFET having different crystalline orientations and parallel fins
10/22/2013US8563368 Thin film transistor array panel and method for manufacturing the same
10/22/2013US8563367 Method of fabricating array substrate for in-plane switching mode liquid crystal display device
10/22/2013US8563365 Air-gap C4 fluidic I/O interconnects and methods of fabricating same
10/22/2013US8563364 Method for producing a power semiconductor arrangement
10/22/2013US8563363 Fabricating method of semiconductor package structure
10/22/2013US8563362 Method of producing semiconductor chip laminate comprising an adhesive that comprises a curing compound, curing agent and spacer particles
10/22/2013US8563361 Packaging method of molded wafer level chip scale package (WLCSP)
10/22/2013US8563360 Power semiconductor device package and fabrication method
10/22/2013US8563359 Method for manufacturing semiconductor device, and semiconductor substrate
10/22/2013US8563358 Method of producing a chip package, and chip package
10/22/2013US8563356 Thin film transistor and method of fabricating the same
10/22/2013US8563355 Method of making a phase change memory cell having a silicide heater in conjunction with a FinFET
10/22/2013US8563353 Method of making a multicomponent film
10/22/2013US8563351 Method for manufacturing photovoltaic device
10/22/2013US8563350 Wafer level image sensor packaging structure and manufacturing method for the same
10/22/2013US8563349 Method of forming semiconductor device
10/22/2013US8563348 Fabrication of electrically active films based on multiple layers
10/22/2013US8563346 Method for manufacturing electrode of dye-sensitized solar cell and dye-sensitized solar cell having electrode thereof
10/22/2013US8563344 Method for producing MEMS structures, and MEMS structure
10/22/2013US8563342 Method of making semiconductor optical integrated device by alternately arranging spacers with integrated device arrays
10/22/2013US8563341 Thin film transistor array substrate and manufacturing method for the same
10/22/2013US8563340 Method for manufacturing light emitting chip
10/22/2013US8563339 System for and method for closed loop electrophoretic deposition of phosphor materials on semiconductor devices
10/22/2013US8563338 Light emitting diode package having an LED chip mounted on a phosphor substrate
10/22/2013US8563337 Simultaneous silicone dispension on coupler
10/22/2013US8563336 Method for forming thin film resistor and terminal bond pad simultaneously
10/22/2013US8563335 Method of controlling polishing using in-situ optical monitoring and fourier transform
10/22/2013US8563334 Method to remove sapphire substrate
10/22/2013US8563332 Wafer reclamation method and wafer reclamation apparatus
10/22/2013US8563331 Process for fabricating and repairing an electronic device
10/22/2013US8563198 Device and method for providing wavelength reduction with a photomask
10/22/2013US8562939 Semiconductor nanocrystal synthesis using a catalyst assisted two-phase reaction
10/22/2013US8562855 Silicon etching liquid and etching method
10/22/2013US8562844 Methods using block co-polymer self-assembly for sub-lithographic patterning
10/22/2013US8562785 Gas distribution showerhead for inductively coupled plasma etch reactor
10/22/2013US8562752 Single workpiece processing chamber
10/22/2013US8562746 Sectional wafer carrier
10/22/2013US8562745 Stable wafer-carrier system
10/22/2013US8562744 Coating device
10/22/2013US8562743 Method and apparatus for atomic layer deposition
10/22/2013US8562742 Apparatus for radial delivery of gas to a chamber and methods of use thereof
10/22/2013US8562392 Polishing apparatus and polishing method
10/22/2013US8562390 Double-disc grinding apparatus and method for producing wafer
10/22/2013US8562275 Transfer device and semiconductor processing system
10/22/2013US8562273 Load port apparatus
10/22/2013US8562272 Substrate load and unload mechanisms for high throughput
10/22/2013US8562271 Compact substrate transport system
10/22/2013US8561664 Die bonder, pickup method, and pickup device
10/22/2013US8561572 Gas supply system, substrate processing apparatus and gas supply method
10/22/2013US8561497 Wrist assembly for robotic arm
10/17/2013WO2013155436A1 Methods for depositing manganese and manganese nitrides
10/17/2013WO2013155396A1 Method for heteroepitaxial growth of high channel conductivity and high breakdown voltage nitrogen polar high electron mobility transistors
10/17/2013WO2013155348A1 Interposer between a tester and material handling equipment to separate and control different requests of multiple entities in a test cell operation
10/17/2013WO2013155345A1 An algorithm and structure for creation, definition, and execution of an spc rule decision tree
10/17/2013WO2013155329A1 Fabricating 3d non-volatile storage with additional word line select gates
10/17/2013WO2013155325A1 3d non-volatile storage with additional word line select gates
10/17/2013WO2013155220A1 Ceramic coated ring and process for applying ceramic coating
10/17/2013WO2013155113A1 Wafer shipper