Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
05/2004
05/27/2004US20040102736 Catheter securement device
05/27/2004US20040102566 B-stageable die attach adhesives
05/27/2004US20040102144 Polishing systems for use with semiconductor substrates including differential pressure application apparatus
05/27/2004US20040102142 Polishing composition
05/27/2004US20040102141 Polishing pad with window for planarization
05/27/2004US20040102139 Method of manufacturing silicon wafer
05/27/2004US20040102138 Methods for aligning a surface of an active retainer ring with a wafer surface for chemical mechanical polishing
05/27/2004US20040102137 Polishing pad for planarization
05/27/2004US20040102128 Vacuum processing system for producing components
05/27/2004US20040102064 Interconnect for microelectronic structures with enhanced spring characteristics
05/27/2004US20040102059 Atmospheric robot handling equipment
05/27/2004US20040102058 Manufacturing apparatus and manufacturing method for semiconductor device
05/27/2004US20040102057 Sacrificial annealing layer for a semiconductor device and a method of fabrication
05/27/2004US20040102056 Production method for silicon wafer and silicon wafer
05/27/2004US20040102055 Crack inhibited composite dielectric layer
05/27/2004US20040102054 Method of removing edge bead during the manufacture of an integrated circuit
05/27/2004US20040102053 Surface modification method
05/27/2004US20040102052 Semiconductor device and its manufacturing method
05/27/2004US20040102049 Method and system to provide material removal and planarization employing a reactive pad
05/27/2004US20040102048 Method for manufacturing semiconductor device
05/27/2004US20040102047 Semiconductor device fabrication method
05/27/2004US20040102046 Semiconductor processing method using photoresist and an antireflective coating
05/27/2004US20040102043 Confocal 3D inspection system and process
05/27/2004US20040102041 Method of manufacturing semiconductor device with capacitor electrode
05/27/2004US20040102040 Film depositon on a semiconductor wafer
05/27/2004US20040102039 Method for forming landing plug in semiconductor device
05/27/2004US20040102038 MOCVD formation of Cu2S
05/27/2004US20040102037 Semiconductor device production method and semiconductor device
05/27/2004US20040102036 Methods of forming conductive contacts
05/27/2004US20040102035 Semiconductor devices and methods for fabricating the same
05/27/2004US20040102034 Semiconductor device, method of generating pattern for semiconductor device, method of manufacturing semiconductor device and device for generating pattern used for semiconductor device
05/27/2004US20040102033 Method for forming a ternary diffusion barrier layer
05/27/2004US20040102032 Selectively converted inter-layer dielectric
05/27/2004US20040102031 Low-K dielectric structure and method
05/27/2004US20040102030 Device and method for forming bump
05/27/2004US20040102029 Method for solder crack deflection
05/27/2004US20040102028 Method for fabricating conductive bumps and substrate with metal bumps for flip chip packaging
05/27/2004US20040102027 Methods of forming buried bit line DRAM circuitry
05/27/2004US20040102026 Lateral doped channel
05/27/2004US20040102025 Method of manufacturing semiconductor device, plasma processing apparatus and plasma processing method
05/27/2004US20040102024 Semiconductor device, method of manufacturing the same, circuit board, and electronic instrument
05/27/2004US20040102022 Methods of fabricating integrated circuitry
05/27/2004US20040102021 Method for microfabricating structures using silicon-on-insulator material
05/27/2004US20040102020 Method for bonding and debonding films using a high-temperature polymer
05/27/2004US20040102019 Split manufacturing method for advanced semiconductor circuits
05/27/2004US20040102018 Method of manufacturing semiconductor device with glue layer in opening
05/27/2004US20040102017 Method of forming trench isolation structure
05/27/2004US20040102016 Method for forming an isolation region in a semiconductor device
05/27/2004US20040102015 Methods for forming semiconductor devices including thermal processing
05/27/2004US20040102014 Method for generating alignment marks for manufacturing mim capacitors
05/27/2004US20040102013 Codoping of source drains using carbon or fluorine ion implants to improve polysilicon depletion
05/27/2004US20040102012 Semiconductor device having silicide film and manufacturing method thereof
05/27/2004US20040102011 Method of fabricating a semiconductor integrated circuit
05/27/2004US20040102010 Reliable high voltage gate dielectric layers using a dual nitridation process
05/27/2004US20040102009 Method for removing contaminants on a substrate
05/27/2004US20040102008 Nonvolatile semiconductor memory device and manufacturing method thereof
05/27/2004US20040102007 Vertical floating gate transistor
05/27/2004US20040102006 sealing porous dielectrics using silane coupling reagents is herein described. A sealant chain (silane coupling reagent) is formed from at least silicon, carbon, oxygen, and hydrogen and exposed to a porous dielectric material, wherein the sealant chain reacts with a second chain, that has at least O2
05/27/2004US20040102005 Method of manufacturing a semiconductor device
05/27/2004US20040102004 Semiconductor storage device and its manufacturing method
05/27/2004US20040102003 6F2 DRAM array, a DRAM array formed on a semiconductive substrate, a method of forming memory cells in a 6F2 DRAM array and a method of isolating a single row of memory cells in a 6F2 DRAM array
05/27/2004US20040102002 Memory cell with tight coupling
05/27/2004US20040102001 Three layer aluminum deposition process for high aspect ratio CL contacts
05/27/2004US20040102000 Photon-blocking layer
05/27/2004US20040101999 Manufacturing method of semiconductor device
05/27/2004US20040101998 Variable quality semiconductor film substrate
05/27/2004US20040101997 Method for fabricating thin film transistor
05/27/2004US20040101996 Interconnection structure and method for designing the same
05/27/2004US20040101995 Method for manufacturing circuit devices
05/27/2004US20040101994 Reducing line to line capacitance using oriented dielectric films
05/27/2004US20040101992 Chips with wafer scale caps formed by molding
05/27/2004US20040101991 Microelectronic device packages and methods for controlling the disposition of non-conductive materials in such packages
05/27/2004US20040101990 Flexural plate wave systems
05/27/2004US20040101989 Evaluation method of semiconductor device, manufacturing method of the semiconductor device, design management system of device comprising the semiconductor device, dose amount control program for the semiconductor device, computer-readable recording medium recording the program, and dose amount control apparatus
05/27/2004US20040101988 Deposition of permanent polymer structures for OLED fabrication
05/27/2004US20040101987 Method of fabrication of electronic devices using microfluidic channels
05/27/2004US20040101984 Method for performing an alignment measurement of two patterns in different layers on a semiconductor wafer
05/27/2004US20040101983 Method and apparatus for overlay control using multiple targets
05/27/2004US20040101982 Holographic or optically variable printing material and method for customized printing
05/27/2004US20040101981 Apparatus for repairing defect of substrate
05/27/2004US20040101980 Method for making ferroelectric thin film
05/27/2004US20040101979 Ferroelectric resistor non-volatile memory
05/27/2004US20040101977 Low thermal budget fabrication of ferroelectric memory using RTP
05/27/2004US20040101784 Process for using photo-definable layers in the manufacture of semiconductor devices and resulting structures of same
05/27/2004US20040101769 Method for adjusting the overlay of two mask planes in a photolithographic process for the production of an integrated circuit
05/27/2004US20040101767 Method and apparatus for dry-etching half-tone phase-shift films, half-tone phase-shift photomasks and method for the preparation thereof, and semiconductor circuits and method for the fabrication thereof
05/27/2004US20040101766 Substrates having radiation transparent and opalescence layers, aperture patterns and grooves, formed by exposing, undercutting, bias adjustment and analyzing; tools for miniaturization of semiconductors; efficiency
05/27/2004US20040101667 Adhesion between dielectric materials
05/27/2004US20040101663 Stacked via-stud with improved reliability in copper metallurgy
05/27/2004US20040101633 Chemical vapor deposition; low dielectric constant (k)
05/27/2004US20040101631 Molding printed circuit boards; electronics
05/27/2004US20040101625 Nitrogen passivation of interface states in SiO2/SiC structures
05/27/2004US20040101622 Comprises spraying ozone and inert gases, purging the ozone, then spraying trimethylaluminum; atomic layer deposition
05/27/2004US20040101620 Method for aluminum metalization of ceramics for power electronics applications
05/27/2004US20040101415 Method and a pump apparatus for the generation of an adjustable, substantially constant volume flow of a fluid and a use of this method
05/27/2004US20040101388 Fabrication system having a clean room on two floors, a clean room, a semiconductor wafer delivery system, and method of performing subsequent fabrication processes on a semiconductor wafer
05/27/2004US20040101387 Exchange method and mechanism for a component of the magnetic head and the suspension or the head gimbal assembly of the hard disk driver during manufacture
05/27/2004US20040101386 Vertical carousel with top and side access stations
05/27/2004US20040101385 Semiconductor process apparatus and SMIF pod used therein
05/27/2004US20040101000 Laser system for dual wavelength and chip scale marker having the same