Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
06/2004
06/01/2004US6744214 Electron beam ion source with integral low-temperature vaporizer
06/01/2004US6744212 Plasma processing apparatus and method for confining an RF plasma under very high gas flow and RF power density conditions
06/01/2004US6744211 Plasma density information measuring method, probe used for measuring plasma density information, and plasma density information measuring apparatus
06/01/2004US6744197 Organic electroluminescent display device and method of fabricating the same
06/01/2004US6744143 Semiconductor device having test mark
06/01/2004US6744142 Flip chip interconnection structure and process of making the same
06/01/2004US6744140 Semiconductor chip and method of producing the same
06/01/2004US6744139 Semiconductor device
06/01/2004US6744138 RuSixOy-containing barrier layers for high-k dielectrics
06/01/2004US6744137 Bumped die and wire bonded board-on-chip package
06/01/2004US6744132 Module with adhesively attached heat sink
06/01/2004US6744126 Multichip semiconductor package device
06/01/2004US6744123 Film carrier tape for mounting electronic devices thereon and method of manufacturing the same
06/01/2004US6744122 Semiconductor device, method of manufacture thereof, circuit board, and electronic device
06/01/2004US6744119 Leadframe having slots in a die pad
06/01/2004US6744118 Frame for semiconductor package
06/01/2004US6744116 Thin film using non-thermal techniques
06/01/2004US6744115 Semiconductor device and process of production of same
06/01/2004US6744114 Package with integrated inductor and/or capacitor
06/01/2004US6744113 Semiconductor device with element isolation using impurity-doped insulator and oxynitride film
06/01/2004US6744112 Multiple chip guard rings for integrated circuit and chip guard ring interconnect
06/01/2004US6744111 Schottky-barrier tunneling transistor
06/01/2004US6744109 Glass attachment over micro-lens arrays
06/01/2004US6744108 Doped silicon diffusion barrier region
06/01/2004US6744106 Non-volatile semiconductor memory device
06/01/2004US6744105 Memory array having shallow bit line with silicide contact portion and method of formation
06/01/2004US6744104 Protected against leakage of doped impurity to channel region; threshold voltage and electrical reliability
06/01/2004US6744103 Short-channel schottky-barrier MOSFET device and manufacturing method
06/01/2004US6744102 MOS transistors with nitrogen in the gate oxide of the p-channel transistor
06/01/2004US6744101 Non-uniform gate/dielectric field effect transistor
06/01/2004US6744100 Semiconductor apparatus with improved ESD withstanding voltage
06/01/2004US6744099 MIS semiconductor device and manufacturing method thereof
06/01/2004US6744098 Transistor devices
06/01/2004US6744097 EEPROM memory cell and method of forming the same
06/01/2004US6744096 Non-volatile memory device having a bit line contact pad and method for manufacturing the same
06/01/2004US6744093 Multilayer electrode for a ferroelectric capacitor
06/01/2004US6744092 Semiconductor memory device capable of preventing oxidation of plug and method for fabricating the same
06/01/2004US6744091 Semiconductor storage device with self-aligned opening and method for fabricating the same
06/01/2004US6744090 Damascene capacitor formed in metal interconnection layer
06/01/2004US6744089 Self-aligned lateral-transistor DRAM cell structure
06/01/2004US6744087 Non-volatile memory using ferroelectric gate field-effect transistors
06/01/2004US6744085 Electronic device with electrode and its manufacture
06/01/2004US6744084 Two-transistor pixel with buried reset channel and method of formation
06/01/2004US6744083 Submicron MOSFET having asymmetric channel profile
06/01/2004US6744082 Static pass transistor logic with transistors with multiple vertical gates
06/01/2004US6744080 Method of manufacturing a bipolar transistor of double-polysilicon, heterojunction-base type and corresponding transistor
06/01/2004US6744079 Optimized blocking impurity placement for SiGe HBTs
06/01/2004US6744078 Heterojunction structure with a charge compensation layer formed between two group III-V semiconductor layers
06/01/2004US6744076 Single crystalline aluminum nitride film, method of forming the same, base substrate for group III element nitride film, light emitting device and surface acoustic wave device
06/01/2004US6744069 Semiconductor device and its manufacturing method
06/01/2004US6744065 Single electron devices
06/01/2004US6744054 Evacuation use sample chamber and circuit pattern forming apparatus using the same
06/01/2004US6744020 Heat processing apparatus
06/01/2004US6744018 Substrate processing apparatus and method for manufacturing semiconductor device
06/01/2004US6744017 Easily manufactured unibody aluminum block device; heat and vacuum environment resistant; durable
06/01/2004US6744008 Laser apparatus and laser annealing method
06/01/2004US6743933 Process of forming thin film and precursor for chemical vapor deposition
06/01/2004US6743881 High resolution microlithography; post exposure delay stability; heat resistance; terpolymer containing styrenic, p-vinylphenol and vinylbenzene containing branched ester substitution
06/01/2004US6743856 Synthesis of siloxane resins
06/01/2004US6743740 Using sonic energy in connection with laser-assisted direct imprinting
06/01/2004US6743739 Fabrication method for semiconductor integrated devices
06/01/2004US6743738 Dopant precursors and processes
06/01/2004US6743737 Forming integrated circuits; plasma vapor deposition
06/01/2004US6743736 Reactive gaseous deposition precursor feed apparatus
06/01/2004US6743734 Bi-layer resist process
06/01/2004US6743733 Process for producing a semiconductor device including etching using a multi-step etching treatment having different gas compositions in each step
06/01/2004US6743732 Organic low K dielectric etch with NH3 chemistry
06/01/2004US6743731 Method for making a radio frequency component and component produced thereby
06/01/2004US6743730 Plasma processing method
06/01/2004US6743729 Etching method and etching apparatus of carbon thin film
06/01/2004US6743728 Method for forming shallow trench isolation
06/01/2004US6743727 Method of etching high aspect ratio openings
06/01/2004US6743726 Method for etching a trench through an anti-reflective coating
06/01/2004US6743725 High selectivity SiC etch in integrated circuit fabrication
06/01/2004US6743724 Planarization process for semiconductor substrates
06/01/2004US6743723 Method for fabricating semiconductor device
06/01/2004US6743722 Method of spin etching wafers with an alkali solution
06/01/2004US6743721 Method and system for making cobalt silicide
06/01/2004US6743720 Method of manufacturing a portion of a memory by selectively etching to remove metal nitride or metal oxynitride extrusions
06/01/2004US6743719 Method for forming a conductive copper structure
06/01/2004US6743718 Process for producing barrier film and barrier film thus produced
06/01/2004US6743717 Method for forming silicide at source and drain
06/01/2004US6743716 Forming insulator layer having substance, forming inhibiting layer on insulator layer, wherein forming inhibiting layer includes depositing second substance on insulator layer, forming a copper metallization layer on the inhibiting layer
06/01/2004US6743715 Dry clean process to improve device gate oxide integrity (GOI) and reliability
06/01/2004US6743714 Low temperature integrated metallization process and apparatus
06/01/2004US6743713 Method of forming dual damascene pattern using dual bottom anti-reflective coatings (BARC)
06/01/2004US6743712 Method of making a semiconductor device by forming a masking layer with a tapered etch profile
06/01/2004US6743711 Method for forming dual damascene line structure
06/01/2004US6743709 Embedded metal nanocrystals
06/01/2004US6743708 Method of manufacturing semiconductor device including steps of forming groove and recess, and semiconductor device
06/01/2004US6743707 Bump fabrication process
06/01/2004US6743706 Integrated circuit package configuration having an encapsulating body with a flanged portion and an encapsulating mold for molding the encapsulating body
06/01/2004US6743705 Transistor with improved source/drain extension dopant concentration
06/01/2004US6743704 Method of manufacturing a semiconductor device
06/01/2004US6743703 Power diode having improved on resistance and breakdown voltage
06/01/2004US6743702 Nitride-based semiconductor laser device and method of forming the same
06/01/2004US6743701 Method for the formation of active area utilizing reverse trench isolation
06/01/2004US6743700 Semiconductor film, semiconductor device and method of their production
06/01/2004US6743699 Method of fabricating semiconductor components
06/01/2004US6743698 Semiconductor wafer, method for producing the same, and wafer chuck