Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
10/2004
10/07/2004US20040198072 Laser processing method
10/07/2004US20040198071 Method of forming silicon oxide film and forming apparatus thereof
10/07/2004US20040198070 Method of depositing low K barrier layers
10/07/2004US20040198069 Method for hafnium nitride deposition
10/07/2004US20040198068 Method for manufacturing semiconductor device
10/07/2004US20040198067 Fabrication process of a semiconductor integrated circuit device
10/07/2004US20040198066 Using supercritical fluids and/or dense fluids in semiconductor applications
10/07/2004US20040198065 Method for fabricating semiconductor device with fine patterns
10/07/2004US20040198064 Small scale wires with microelectromechanical devices
10/07/2004US20040198063 Three dimensional high aspect ratio micromachining
10/07/2004US20040198062 Method of fabricating a dual damascene interconnect structure
10/07/2004US20040198061 Method of etching a contact opening
10/07/2004US20040198060 Selective spacer layer deposition method for forming spacers with different widths
10/07/2004US20040198059 Method of forming metal line of semiconductor device
10/07/2004US20040198058 Methods of forming field effect transistor gates
10/07/2004US20040198057 Method forming metal filled semiconductor features to improve structural stability
10/07/2004US20040198056 Polishing pad and semiconductor substrate manufacturing method using the polishing pad
10/07/2004US20040198055 Method for forming thick copper self-aligned dual damascene
10/07/2004US20040198054 Passivation of porous semiconductors
10/07/2004US20040198052 Apparatus for manufacturing semiconductor device
10/07/2004US20040198051 Apparatus and method for single substrate processing
10/07/2004US20040198050 Method for fabricating a circuit device
10/07/2004US20040198046 Method for decreasing contact resistance of source/drain electrodes
10/07/2004US20040198045 Method for forming a titanium nitride layer
10/07/2004US20040198043 [discrete circuit component having fabrication stage clogged through-holes and process of making the same]
10/07/2004US20040198042 Preparation of Group IVA and Group VIA compounds
10/07/2004US20040198041 Method of manufacturing a semiconductor device
10/07/2004US20040198040 Sloped via contacts
10/07/2004US20040198039 Method and arrangement for contacting terminals
10/07/2004US20040198038 Method of forming shallow trench isolation with chamfered corners
10/07/2004US20040198037 Method for manufacturing semiconductor device
10/07/2004US20040198036 Semiconductor device having a tapered interconnection with insulating material on conductive sidewall thereof within through hole
10/07/2004US20040198035 Method of damascene process flow
10/07/2004US20040198034 Localized slots for stress relieve in copper
10/07/2004US20040198033 Double bumping of flexible substrate for first and second level interconnects
10/07/2004US20040198032 Semiconductor device having silicide thin film and method of forming the same
10/07/2004US20040198031 Method for forming structures in finfet devices
10/07/2004US20040198030 Vapor phase etch trim structure with top etch blocking layer
10/07/2004US20040198029 Process for producing thin oxide film and production apparatus
10/07/2004US20040198028 Laser irradiation method, laser irradiation apparatus and method for manufacturing semiconductor device
10/07/2004US20040198027 Method of preparing a poly-crystalline silicon film
10/07/2004US20040198026 Transferable device-containing layer for silicon-on-insulator applications
10/07/2004US20040198025 Methods of forming metal-containing layers
10/07/2004US20040198024 Method for cutting semiconductor wafer using laser scribing process
10/07/2004US20040198021 Use of photoresist in substrate vias during backside grind
10/07/2004US20040198020 Local oxidation of silicon (LOCOS) method employing graded oxidation mask
10/07/2004US20040198019 Manufacturing method of semiconductor device
10/07/2004US20040198018 Method of manufacturing a semiconductor device
10/07/2004US20040198017 Method to solve alignment mark blinded issues and technology for application of semiconductor etching at a tiny area
10/07/2004US20040198016 Methods of forming void regions, dielectric regions and capacitor constructions
10/07/2004US20040198015 Method of forming an isolation layer and method of manufacturing a trench capacitor
10/07/2004US20040198014 Method for increasing capacitance of deep trench capacitors
10/07/2004US20040198013 Semiconductor process and PMOS varactor
10/07/2004US20040198011 Polishing method
10/07/2004US20040198010 Semiconductor layer and forming method thereof, and semiconductor device and manufaturing method thereof
10/07/2004US20040198009 Selective formation of metal gate for dual gate oxide application
10/07/2004US20040198008 Method of forming bit line contact via
10/07/2004US20040198007 Semiconductor device having a metal silicide layer and method for manufacturing the same
10/07/2004US20040198006 Method of forming self-aligned contacts
10/07/2004US20040198005 Semiconductor structure with partially etched gate and method of fabricating the same
10/07/2004US20040198004 Low voltage high performance semiconductor devices and methods
10/07/2004US20040198003 Multiple-gate transistors with improved gate control
10/07/2004US20040198002 Semiconductor device and method of manufacturing thereof
10/07/2004US20040198001 Method of generating multiple oxides by plasma nitridation on oxide
10/07/2004US20040198000 Method of generating multiple oxides by plasma nitridation on oxide
10/07/2004US20040197999 [split gate flash memory cell and manufacutirng method thereof]
10/07/2004US20040197998 Spacer like floating gate formation
10/07/2004US20040197997 Method of manufacturing an isolation-less, contact-less array of bi-directional read/program non-volatile floating gate memory cells with independent controllable control gates
10/07/2004US20040197996 Self aligned method of forming a semiconductor memory array of floating gate memory cells with buried floating gate, pointed floating gate and pointed channel region, and a memory array made thereby
10/07/2004US20040197995 Method of manufacturing twin-ONO-type SONOS memory using reverse self-alignment process
10/07/2004US20040197994 [flash memory device structure and manufacturing method thereof]
10/07/2004US20040197993 Non-volatile memory integrated circuit
10/07/2004US20040197992 Floating gates having improved coupling ratios and fabrication method thereof
10/07/2004US20040197991 Dual damascene interconnection with metal-insulator-metal capacitor and method of fabricating the same
10/07/2004US20040197990 Semiconductor device and method of manufacturing the same
10/07/2004US20040197989 DRAM memory having vertically arranged selection transistors
10/07/2004US20040197988 Method for fabricating a trench capacitor with an insulation collar
10/07/2004US20040197987 Semiconductor integrated circuit device and manufacturing method thereof
10/07/2004US20040197986 Method of filling bit line contact via
10/07/2004US20040197985 Manufacturing method of an integrated chip
10/07/2004US20040197984 Adhesion layer for Pt on SiO2
10/07/2004US20040197983 Electrically conducting ternary amorphous fully oxidized materials and their application
10/07/2004US20040197982 Self-aligned gate and method
10/07/2004US20040197981 Light emitting diode having a transparent substrate and a method for manufacturing the same
10/07/2004US20040197980 Highly integrated and reliable DRAM and its manufacture
10/07/2004US20040197979 Reinforced solder bump structure and method for forming a reinforced solder bump
10/07/2004US20040197977 Field-effect transistor with horizontal self-aligned gates and the production method therefor
10/07/2004US20040197976 Method for manufacturing sidewall contacts for a chalcogenide memory device
10/07/2004US20040197975 Narrow fin finfet
10/07/2004US20040197974 Silicon fixture supporting silicon wafers during high temperature processing
10/07/2004US20040197972 Multi-pattern shadow mask system for laser annealing
10/07/2004US20040197971 Process of fabricating a semiconductor device
10/07/2004US20040197970 Semiconductor device and method of manufacturing thereof
10/07/2004US20040197969 Semiconductor device with raised segment
10/07/2004US20040197968 [low temperature polysilicon thin film transistor and method of forming polysilicon layer of same]
10/07/2004US20040197967 Method for forming a low temperature polysilicon CMOS thin film transistor
10/07/2004US20040197966 Manufacturing method of liquid crystal display device
10/07/2004US20040197965 Method for forming an SOI substrate, vertical transistor and memory cell with vertical transistor
10/07/2004US20040197964 Method for fabricating thin film transistor for liquid crystal display device
10/07/2004US20040197963 Preventive treatment method for a multilayer semiconductor wafer