Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
09/2004
09/30/2004WO2004084297A1 Method of conveyance positioning for workpiece processing systems and, workpiece processing system
09/30/2004WO2004084296A1 Probe positioning and bonding device and probe bonding method
09/30/2004WO2004084294A1 Method of manufacturing a semiconductor device, semiconductor device obtained by means of said method, and device for carrying outsuch a method
09/30/2004WO2004084293A1 Parts packaging device and parts packaging method
09/30/2004WO2004084292A1 Finfet-type semiconductor device and method for fabricating the same
09/30/2004WO2004084291A1 Semiconductor device and method for manufacturing semiconductor device
09/30/2004WO2004084290A1 A nitrogen-free hard mask over low k dielectric
09/30/2004WO2004084289A1 Substrate treating apparatus and method of substrate treatment
09/30/2004WO2004084288A1 Process for production of etching or cleaning fluids
09/30/2004WO2004084287A1 Material for purification of semiconductor polishing slurry, module for purification of semiconductor polishing slurry and process for producing semiconductor polishing slurry
09/30/2004WO2004084286A1 Film forming mehtod and film forming apparatus for semiconductor device
09/30/2004WO2004084285A1 Film forming method and film forming apparatus for semiconductor device
09/30/2004WO2004084284A1 Film forming method and apparatus
09/30/2004WO2004084283A1 Method of growing semiconductor crystal
09/30/2004WO2004084282A1 Bifacial structure for tandem solar cell formed with amorphous semiconductor materials
09/30/2004WO2004084280A2 Processing system and method for treating a substrate
09/30/2004WO2004084278A1 Device and method for wet treating disc-shaped articles
09/30/2004WO2004084275A2 Method for making group iii nitride devices and devices produced thereby
09/30/2004WO2004084271A2 Method and apparatus for thermally insulating adjacent temperature controlled processing chambers
09/30/2004WO2004084269A2 Low dielectric materials and methods of producing same
09/30/2004WO2004084268A2 Epitaxial semiconductor deposition methods and structures
09/30/2004WO2004084267A2 System, method and apparatus for improved local dual-damascene planarization
09/30/2004WO2004084266A2 System, method and apparatus for improved global dual-damascene planarization
09/30/2004WO2004084264A2 DUAL STRAIN-STATE SiGe LAYERS FOR MICROELECTRONICS
09/30/2004WO2004084239A1 Allowance method for point to ground resistance on tray
09/30/2004WO2004083961A1 Substrate for reticle and method of manufacturing the substrate, and mask blank and method of manufacturing the mask blank
09/30/2004WO2004083901A2 Detection of macro-defects using micro-inspection inputs
09/30/2004WO2004083759A2 Apparatus and method of forming channels in a heat-exchanging device
09/30/2004WO2004083495A2 Ultra low k (ulk) sicoh film and method
09/30/2004WO2004083490A2 Methods and apparatus for patterned deposition of nanostructure-containing materials by self-assembly and related articles
09/30/2004WO2004083482A1 Copper alloy sputtering target process for producing the same and semiconductor element wiring
09/30/2004WO2004083328A2 Slurry compositions for use in a chemical-mechanical planarization process having non-spherical abrasive particles
09/30/2004WO2004082890A1 Wafer-retaining carrier, double side-grinding device using the same, and double side-grinding method for wafer
09/30/2004WO2004082857A1 Systems and methods for cleaning semiconductor substrates using a reduced volume of liquid
09/30/2004WO2004082821A2 Processing system and method for thermally treating a substrate
09/30/2004WO2004082820A2 Processing system and method for chemically treating a substrate
09/30/2004WO2004082730A2 Protective sheath for a cannula
09/30/2004WO2004068572A3 Method for producing a semiconductor component
09/30/2004WO2004068561A3 Method for polishing a shallow trench isolation using an amorphous carbon polish-stop layer
09/30/2004WO2004066369A3 Carrier, holder, laser cutting device and method for separating semiconductor products using laser light
09/30/2004WO2004066368A3 Shallow trench isolation process for strained silicon processes
09/30/2004WO2004059751A3 Methods of forming semiconductor mesa structures including self-aligned contact layers and related devices
09/30/2004WO2004059739A3 Memory architecture with series grouped memory cells
09/30/2004WO2004059708A3 Structure and method for bonding to copper interconnect structures
09/30/2004WO2004055922A3 Method for the production of organic field effect transistors with a top contact architecture made of conductive polymers
09/30/2004WO2004054003B1 High efficiency, monolithic multijunction solar cells containing lattice-mismatched materials and methods of forming same
09/30/2004WO2004050728A3 Method of producing (meth) acrylic acid derivative polymer for resist
09/30/2004WO2004042781A3 Thin film transistor array panel
09/30/2004WO2004035105A3 Polymer microneedles
09/30/2004WO2004034445B1 A method for plasma etching performance enhancement
09/30/2004WO2004032593A3 Extremely thin substrate support
09/30/2004WO2004030045A3 Semiconductor device processing
09/30/2004WO2004025713A9 Substrate end effector
09/30/2004WO2004021227A3 Extracting wiring parasitics for filtered interconnections in an integrated circuit
09/30/2004WO2004010465A3 Thin dielectric formation by steam oxidation
09/30/2004WO2003014979A3 Method for selection of parameters for implant anneal of patterned semiconductor substrates and specification of a laser system
09/30/2004WO2002087825A8 Integrated endpoint detection system with optical and eddy current monitoring
09/30/2004US20040194049 Method and system for designing IC
09/30/2004US20040194047 Layout design apparatus
09/30/2004US20040194044 Device for creating timing constraints
09/30/2004US20040194042 Method and apparatus of evaluating layer matching deviation based on CAD information
09/30/2004US20040193991 Semiconductor integrated circuit including operation test circuit and operation test method thereof
09/30/2004US20040193984 Signature Cell
09/30/2004US20040193437 Parts management system and method and parts management program and storage medium
09/30/2004US20040193383 Computer chip heat responsive method and apparatus
09/30/2004US20040193381 Method for analyzing wafer test parameters
09/30/2004US20040193301 Inventory control via a utility bill of materials (BOM) to minimize resource consumption
09/30/2004US20040193300 Systems and methods for transferring small lot size substrate carriers between processing tools
09/30/2004US20040192804 Photosensitive resin composition
09/30/2004US20040192572 comprises carbon dioxide, additive (tetramethylammoniumfluoride) for removing residues, inhibitor (ethylene glycol) of residues, and co-solvent for dissolving additive and inhibitor in carbon dioxide at pressurized fluid conditions; for removal of photoresists during semiconductor processing
09/30/2004US20040192176 Methods and apparatuses for mechanical and chemical-mechanical planarization of microelectronic-device substrate assemblies on planarizing pads
09/30/2004US20040192174 Method for controlling PH during planarization and cleaning of microelectronic substrates
09/30/2004US20040192172 Slurry of nonoxidized particles and oxidized particles and separation of particles for semiconductors
09/30/2004US20040192171 Method of producing a glass substrate for a mask blank and method of producing a mask blank
09/30/2004US20040192168 Arrangement and method for conditioning a polishing pad
09/30/2004US20040192154 Apparatus and method for manufacturing organic EL display device
09/30/2004US20040192102 Insertion apparatus and method
09/30/2004US20040192072 Interconnected networks of single-walled carbon nanotubes
09/30/2004US20040192071 Production method for anneal wafer and anneal wafer
09/30/2004US20040192069 Method of creating high-quality relaxed SiGe-on-insulator for strained Si CMOS applications
09/30/2004US20040192068 Method of using SACVD deposition and corresponding deposition reactor
09/30/2004US20040192067 Method for forming a relaxed or pseudo-relaxed useful layer on a substrate
09/30/2004US20040192066 Method for immersing a substrate
09/30/2004US20040192065 Bilayer ultra-thin gate dielectric and process for semiconductor metal contamination reduction
09/30/2004US20040192064 Method and apparatus for homogeneous mixing
09/30/2004US20040192063 Method of producing a glass substrate for a mask blank and method of producing a mask blank
09/30/2004US20040192062 Process to pattern thick TiW metal layers using uniform and selective etching
09/30/2004US20040192061 Method of manufacturing electronic device
09/30/2004US20040192060 Method for fabricating a semiconductor structure
09/30/2004US20040192059 Method for etching a titanium-containing layer prior to etching an aluminum layer in a metal stack
09/30/2004US20040192058 Pre-etching plasma treatment to form dual damascene with improved profile
09/30/2004US20040192057 Technique for forming an oxide/nitride layer stack by compensating nitrogen non-uniformities
09/30/2004US20040192056 Dry-etcching method
09/30/2004US20040192055 High concentration indium fluorine retrograde wells
09/30/2004US20040192054 Etch of silicon nitride selective to silicon and silicon dioxide useful during the formation of a semiconductor device
09/30/2004US20040192053 Etching method and apparatus
09/30/2004US20040192052 Viscous protective overlayers for planarization of integrated circuits
09/30/2004US20040192051 Method of forming a damascene structure
09/30/2004US20040192050 Method for etching semiconductor substrate
09/30/2004US20040192049 Polishing composition and method for forming wiring structure using the same