Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
11/2004
11/09/2004US6815696 Beam stop for use in an ion implantation system
11/09/2004US6815695 Simplified reticle stage removal system for an electron beam system
11/09/2004US6815681 Pyroelectric plate on which a patterned metal thin layer is formed as an electron beam source without using a high voltage
11/09/2004US6815661 Specimen scanning mechanism adapted for implementation in a FIMS system
11/09/2004US6815647 Heat treatment unit and heat treatment method
11/09/2004US6815646 Ceramic substrate for semiconductor manufacture/inspection apparatus, ceramic heater, electrostatic clampless holder, and substrate for wafer prober
11/09/2004US6815645 Heat reflecting material and heating device using the material
11/09/2004US6815613 Electronic component with external connection elements
11/09/2004US6815568 Process for purifying octafluorocyclobutane, process for preparing the same, and use thereof
11/09/2004US6815523 Heat and chemical resistance; dielectrics
11/09/2004US6815377 Laser annealing method and apparatus for determining laser annealing conditions
11/09/2004US6815376 Microelectronic substrate edge bead processing apparatus and method
11/09/2004US6815375 Methods of forming dielectric materials and methods of processing semiconductor substrates
11/09/2004US6815374 Method for improving thickness uniformity of deposited ozone-TEOS silicate glass layers
11/09/2004US6815373 Use of cyclic siloxanes for hardness improvement of low k dielectric films
11/09/2004US6815372 Sputtered insulating layer for wordline stacks
11/09/2004US6815371 Edge bead removal for spin-on materials containing low volatility solvents using carbon dioxide cleaning
11/09/2004US6815370 Plasma enhanced chemical vapor deposition apparatus and method for forming nitride layer using the same
11/09/2004US6815369 Method for monitoring deposition reaction during processing the surface of a semiconductor substrate
11/09/2004US6815368 Semiconductor substrate cleaning
11/09/2004US6815367 Elimination of resist footing on tera hardmask
11/09/2004US6815366 Method for etching organic insulating film and method for fabricating semiconductor device
11/09/2004US6815365 Plasma etching apparatus and plasma etching method
11/09/2004US6815364 Tungsten hard mask
11/09/2004US6815361 Method of fabricating anti-stiction micromachined structures
11/09/2004US6815359 Process for improving the etch stability of ultra-thin photoresist
11/09/2004US6815357 Process and apparatus for manufacturing a semiconductor device
11/09/2004US6815356 Method for forming bottle trench
11/09/2004US6815355 Method of integrating L-shaped spacers in a high performance CMOS process via use of an oxide-nitride-doped oxide spacer
11/09/2004US6815354 Method and structure for thru-mask contact electrodeposition
11/09/2004US6815353 Multi-layer film stack polish stop
11/09/2004US6815352 Silicon focus ring and method for producing the same
11/09/2004US6815351 Method for contacting a semiconductor configuration
11/09/2004US6815350 Method for forming a thin film using an atomic layer deposition (ALD) process
11/09/2004US6815349 Electroless copper deposition apparatus
11/09/2004US6815348 Method of plugging through-holes in silicon substrate
11/09/2004US6815347 Method of forming a reflective electrode
11/09/2004US6815346 Unique feature design enabling structural integrity for advanced low k semiconductor chips
11/09/2004US6815345 Method for in-line monitoring of via/contact holes etch process based on test structures in semiconductor wafer manufacturing
11/09/2004US6815344 Methods of forming an electrically conductive line
11/09/2004US6815343 Gas treatment of thin film structures with catalytic action
11/09/2004US6815342 Low resistance metal interconnect lines and a process for fabricating them
11/09/2004US6815341 Method for fabricating metal interconnect in a carbon-containing silicon oxide film
11/09/2004US6815340 Method of forming an electroless nucleation layer on a via bottom
11/09/2004US6815339 Method for forming copper metal line in semiconductor device
11/09/2004US6815338 Multilayer wiring structure of semiconductor device, method of producing said multilayer wiring structure and semiconductor device to be used for reliability evaluation
11/09/2004US6815337 Method to improve borderless metal line process window for sub-micron designs
11/09/2004US6815336 Planarization of copper damascene using reverse current electroplating and chemical mechanical polishing
11/09/2004US6815335 Method for forming a contact in a semiconductor process
11/09/2004US6815334 Method for forming multi-layer metal line of semiconductor device
11/09/2004US6815333 Tri-layer masking architecture for patterning dual damascene interconnects
11/09/2004US6815332 Method for forming integrated dielectric layers
11/09/2004US6815331 Method for forming metal wiring layer of semiconductor device
11/09/2004US6815330 Semiconductor integrated circuit device and manufacturing method of semiconductor integrated circuit device
11/09/2004US6815329 Multilayer interconnect structure containing air gaps and method for making
11/09/2004US6815328 Method of manufacturing an integrated semiconductor device having a plurality of connection levels
11/09/2004US6815327 Mask repattern process
11/09/2004US6815326 Method of manufacturing semiconductor electrode and semiconductor device provided with electrodes manufactured by the method
11/09/2004US6815325 Semiconductor device and test method for manufacturing same
11/09/2004US6815324 Reliable metal bumps on top of I/O pads after removal of test probe marks
11/09/2004US6815323 Ohmic contacts on n-type silicon carbide using carbon films
11/09/2004US6815322 Fabrication method of semiconductor device
11/09/2004US6815321 Thin-film transistor and method of making same
11/09/2004US6815320 Method for fabricating semiconductor device including gate spacer
11/09/2004US6815318 Manufacturing method of semiconductor device
11/09/2004US6815317 Method to perform deep implants without scattering to adjacent areas
11/09/2004US6815316 Apparatus for fabricating compound semiconductor device
11/09/2004US6815315 Method for electrochemical oxidation
11/09/2004US6815314 Hermetic chip and method of manufacture
11/09/2004US6815313 Electronic component to be mounted on a circuit board having electronic circuit device sealed therein and method of manufacturing the same
11/09/2004US6815312 Bonding type semiconductor substrate, semiconductor light emitting element, and preparation process thereof
11/09/2004US6815311 Method for fabricating semiconductor memory device
11/09/2004US6815310 Technique to obtain high mobility channels in MOS transistors by forming a strain layer on an underside of a channel
11/09/2004US6815309 Support-integrated donor wafers for repeated thin donor layer separation
11/09/2004US6815307 Method for fabricating a deep trench capacitor
11/09/2004US6815305 Method for fabricating BICMOS semiconductor devices
11/09/2004US6815304 Silicon carbide bipolar junction transistor with overgrown base region
11/09/2004US6815303 Bipolar transistors with low-resistance emitter contacts
11/09/2004US6815302 Method of making a bipolar transistor with an oxygen implanted emitter window
11/09/2004US6815301 Method for fabricating bipolar transistor
11/09/2004US6815300 Method for manufacturing semiconductor device having increased effective channel length
11/09/2004US6815299 Method for manufacturing silicon carbide device using water rich anneal
11/09/2004US6815298 Method of forming a semiconductor device including forming an amorphous silicon layer over and reacting with a silicide layer
11/09/2004US6815297 Ultra-thin fully depleted SOI device and method of fabrication
11/09/2004US6815296 Polysilicon back-gated SOI MOSFET for dynamic threshold voltage control
11/09/2004US6815295 Method of manufacturing field effect transistors
11/09/2004US6815294 Vertical nano-size transistor using carbon nanotubes and manufacturing method thereof
11/09/2004US6815293 High-voltage lateral transistor with a multi-layered extended drain structure
11/09/2004US6815292 Flash memory having improved core field isolation in select gate regions
11/09/2004US6815291 Method of manufacturing semiconductor device
11/09/2004US6815290 Stacked gate flash memory device and method of fabricating the same
11/09/2004US6815289 Method of manufacturing semiconductor device
11/09/2004US6815288 Merged memory and logic semiconductor device of salicided dual gate structure including embedded memory of self-aligned contact structure and manufacturing method thereof
11/09/2004US6815287 Localized array threshold voltage implant to enhance charge storage within DRAM memory cells
11/09/2004US6815285 Methods of forming dual gate semiconductor devices having a metal nitride layer
11/09/2004US6815284 Manufacturing method of semiconductor device
11/09/2004US6815283 Method of manufacturing semiconductor devices
11/09/2004US6815282 Silicon on insulator field effect transistor having shared body contact
11/09/2004US6815281 Method of manufacturing a semiconductor device having a memory cell section and an adjacent circuit section
11/09/2004US6815280 Method of manufacturing a semiconductor device including a plurality of kinds of MOS transistors having different gate widths