Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
11/2004
11/16/2004US6819425 Lithographic apparatus, device manufacturing method, and device manufactured thereby
11/16/2004US6819424 Exposure device for a strip-shaped workpiece
11/16/2004US6819405 Lithographic apparatus, device manufacturing method, and device manufactured thereby
11/16/2004US6819404 Stage device and exposure apparatus
11/16/2004US6819403 Illumination optical system, exposure apparatus, and microdevice manufacturing method
11/16/2004US6819402 System and method for laser beam expansion
11/16/2004US6819401 Exposure method and apparatus
11/16/2004US6819400 Lithographic apparatus and device manufacturing method
11/16/2004US6819399 Exposure mask for fabricating liquid crystal display and method for exposing substrate in fabricating liquid crystal display using the mask
11/16/2004US6819398 Exposure apparatus and control method therefor, and semiconductor device manufacturing method
11/16/2004US6819396 Exposure apparatus, and device manufacturing method
11/16/2004US6819389 Liquid crystal display device with a substrate having an opening on an organic film thereof to accommodate sealing material therethrough
11/16/2004US6819140 Self-synchronous logic circuit having test function and method of testing self-synchronous logic circuit
11/16/2004US6819119 Method for evaluating a crystalline semiconductor substrate
11/16/2004US6819004 Encapsulated with epoxy resin; fluid flow
11/16/2004US6819003 Recessed encapsulated microelectronic devices and methods for formation
11/16/2004US6819002 Between a bonding pad on a chip and a solder bump made with tin-based material, adhesion layer, a nickel-vanadium layer, wettable layer, barrier layer
11/16/2004US6819000 High density area array solder microjoining interconnect structure and fabrication method
11/16/2004US6818997 Dual-damascene processing, wherein a via is etched through dielectric layer and into electroconductive structure, photoresist forms and is hardened, then unhardened areas are removed to form slot in dielectric layer
11/16/2004US6818996 Multi-level redistribution layer traces for reducing current crowding in flipchip solder bumps
11/16/2004US6818995 Semiconductor device and method of manufacturing the same
11/16/2004US6818993 Insulation structure for wiring which is suitable for self-aligned contact and multilevel wiring
11/16/2004US6818992 Self-aligned copper silicide formation for improved adhesion/electromigration
11/16/2004US6818991 Copper-alloy interconnection layer
11/16/2004US6818990 Fluorine diffusion barriers for fluorinated dielectrics in integrated circuits
11/16/2004US6818989 BGA type semiconductor device, tape carrier for semiconductor device, and semiconductor device using said tape carrier
11/16/2004US6818987 Electronic component and process for manufacturing the same
11/16/2004US6818984 Programmable multi-chip module
11/16/2004US6818983 Semiconductor memory chip and semiconductor memory device using the same
11/16/2004US6818978 Ball grid array package with shielding
11/16/2004US6818976 Bumped chip carrier package using lead frame
11/16/2004US6818975 Electric charge generating semiconductor substrate bump forming device, method of removing electric charge from electric charge generating semiconductor substrate device for removing electric charge from electric charge generating semiconductor substrate, and electric charge generating semiconductor substrate
11/16/2004US6818969 Semiconductor device
11/16/2004US6818967 Fabricating method of low temperature poly-silicon film and low temperature poly-silicon thin film transistor
11/16/2004US6818966 Method and structure for controlling surface properties of dielectric layers in a thin film component for improved trimming
11/16/2004US6818964 Selectively-etched nanochannel electrophoretic and electrochemical devices
11/16/2004US6818962 Image sensor having integrated thin film infrared filter
11/16/2004US6818957 Semiconductor chip with fuse unit
11/16/2004US6818956 Non-volatile memory device and fabrication method thereof
11/16/2004US6818954 Lateral high breakdown voltage MOSFET and device provided therewith
11/16/2004US6818953 Protection of an integrated circuit against electrostatic discharges and other overvoltages
11/16/2004US6818952 Damascene gate multi-mesa MOSFET
11/16/2004US6818951 Arrangement in a power mosfet
11/16/2004US6818949 Semiconductor device and method for fabricating the same
11/16/2004US6818948 Split gate flash memory device and method of fabricating the same
11/16/2004US6818946 Trench MOSFET with increased channel density
11/16/2004US6818944 Nonvolatile memory devices and methods of fabricating the same
11/16/2004US6818943 Semiconductor device having a shield plate for applying electric potential to the semiconductor substrate
11/16/2004US6818942 Non-volatile semiconductor storage device having conductive layer surrounding floating gate
11/16/2004US6818938 MOS transistor and method of forming the transistor with a channel region in a layer of composite material
11/16/2004US6818937 Memory cell having a vertical transistor with buried source/drain and dual gates
11/16/2004US6818936 Scaled EEPROM cell by metal-insulator-metal (MIM) coupling
11/16/2004US6818935 Semiconductor device and method for fabricating the same
11/16/2004US6818934 Image sensor having micro-lens array separated with trench structures and method of making
11/16/2004US6818932 Semiconductor device with improved soft error resistance
11/16/2004US6818931 Chip design with power rails under transistors
11/16/2004US6818930 Gated isolation structure for imagers
11/16/2004US6818929 Standard cell for plural power supplies and related technologies
11/16/2004US6818928 Quaternary-ternary semiconductor devices
11/16/2004US6818926 Method for manufacturing gallium nitride compound semiconductor
11/16/2004US6818925 Semiconductor substrates and structures
11/16/2004US6818923 Thin film transistor array substrate and manufacturing method thereof
11/16/2004US6818922 Thin film transistor array and driving circuit structure
11/16/2004US6818921 SOI substrate, element substrate, semiconductor device, electro-optical apparatus and electronic equipment
11/16/2004US6818912 Radiation source, lithographic apparatus, device manufacturing method, and device manufactured thereby
11/16/2004US6818894 Method and apparatus for characterization of ultrathin silicon oxide films using mirror-enhanced polarized reflectance fourier transform infrared spectroscopy
11/16/2004US6818880 Enhanced photo-EMF sensor with high bandwidth and large field of view
11/16/2004US6818864 LED heat lamp arrays for CVD heating
11/16/2004US6818861 Discharge electrode for a wire bonding apparatus
11/16/2004US6818840 Method for manufacturing raised electrical contact pattern of controlled geometry
11/16/2004US6818836 Printed circuit board and its manufacturing method
11/16/2004US6818783 Volatile precursors for deposition of metals and metal-containing films
11/16/2004US6818608 A mixture comprising tetrabutylammonium fluoride, 1,8-diazabicyclo(5.4.0)undec-7-ene or diethylhyroxlyamine, a solvent of n,n-dimethylacetamide or methyl ethyl ketone; antisoilants removing polysiloxanes, acrylic, epoxy resins
11/16/2004US6818604 One or more cleaning stations, each comprising; one or more sponges having a surface charge and configured for cleaning said workpieces, a fluid delivery system, a workpiece cleaning fluid, and a sponge cleaning fluid.
11/16/2004US6818570 Method of forming silicon-containing insulation film having low dielectric constant and high mechanical strength
11/16/2004US6818569 Method of fabricating annealed wafer
11/16/2004US6818567 Method for selectively oxidizing a silicon wafer
11/16/2004US6818566 Thermal activation of fluorine for use in a semiconductor chamber
11/16/2004US6818565 Gate insulator pre-clean procedure
11/16/2004US6818564 Method for etching a tapered bore in a silicon substrate, and a semiconductor wafer comprising the substrate
11/16/2004US6818561 Control methodology using optical emission spectroscopy derived data, system for performing same
11/16/2004US6818560 Plasma processing apparatus and plasma processing method
11/16/2004US6818558 Method of manufacturing a dielectric layer for a silicon-oxide-nitride-oxide-silicon (SONOS) type devices
11/16/2004US6818557 Method of forming SiC capped copper interconnects with reduced hillock formation and improved electromigration resistance
11/16/2004US6818556 Method of plating a metal or metal compound on a semiconductor substrate that includes using the same main component in both plating and etching solutions
11/16/2004US6818555 Method for metal etchback with self aligned etching mask
11/16/2004US6818554 Method for fabricating a semiconductor device having a metallic silicide layer
11/16/2004US6818553 Etching process for high-k gate dielectrics
11/16/2004US6818552 Method for eliminating reaction between photoresist and OSG
11/16/2004US6818551 Methods of forming contact holes using multiple insulating layers
11/16/2004US6818550 Method of cutting a wafer into individual chips
11/16/2004US6818549 Buried magnetic tunnel-junction memory cell and methods
11/16/2004US6818548 Fast ramp anneal for hillock suppression in copper-containing structures
11/16/2004US6818547 Dual damascene process
11/16/2004US6818546 Semiconductor integrated circuit device and a method of manufacturing the same
11/16/2004US6818545 Low fabrication cost, fine pitch and high reliability solder bump
11/16/2004US6818544 Compliant, solderable input/output bump structures
11/16/2004US6818543 Process and apparatus for mounting semiconductor components to substrates and parts therefor
11/16/2004US6818541 Metal bonding method for semiconductor circuit components employing prescribed feeds of metal balls
11/16/2004US6818539 Semiconductor devices and methods of fabricating the same