H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
11/2004
11/16/2004	US6818538 Ball grid array semiconductor package and method of fabricating the same
11/16/2004	US6818537 Method of manufacturing a contact plug for a semiconductor device
11/16/2004	US6818536 Semiconductor device and method of manufacturing the same
11/16/2004	US6818535 Thin phosphorus nitride film as an n-type doping source used in a laser doping technology
11/16/2004	US6818534 DRAM having improved leakage performance and method for making same
11/16/2004	US6818533 Epitaxial plasma enhanced chemical vapor deposition (PECVD) method providing epitaxial layer with attenuated defects
11/16/2004	US6818532 Method of etching substrates
11/16/2004	US6818530 Exfoliating method, transferring method of thin film device, and thin film device, thin film integrated circuit device, and liquid crystal display device produced by the same
11/16/2004	US6818529 Apparatus and method for forming a silicon film across the surface of a glass substrate
11/16/2004	US6818528 Method for multi-depth trench isolation
11/16/2004	US6818527 Method of manufacturing semiconductor device with shallow trench isolation
11/16/2004	US6818526 Method for moat nitride pull back for shallow trench isolation
11/16/2004	US6818525 Semiconductor device and method of providing regions of low substrate capacitance
11/16/2004	US6818524 Method of improving alignment for semiconductor fabrication
11/16/2004	US6818523 Semiconductor storage device manufacturing method which forms a hydrogen diffusion inhibiting layer
11/16/2004	US6818522 Method for forming capacitor of semiconductor device with RuTiN and RuTiO diffusion barrier
11/16/2004	US6818521 Method of manufacturing a hetero-junction bipolar transistor with epitaxially grown multi-layer films and annealing at or below 600° C.
11/16/2004	US6818520 Method for controlling critical dimension in an HBT emitter
11/16/2004	US6818519 Method of forming organic spacers and using organic spacers to form semiconductor device features
11/16/2004	US6818518 Method for producing low/high voltage threshold transistors in semiconductor processing
11/16/2004	US6818517 Methods of depositing two or more layers on a substrate in situ
11/16/2004	US6818516 Selective high k dielectrics removal
11/16/2004	US6818515 Method for fabricating semiconductor device with loop line pattern structure
11/16/2004	US6818514 Semiconductor device with dual gate oxides
11/16/2004	US6818513 Method of forming a field effect transistor having a lateral depletion structure
11/16/2004	US6818512 Split-gate flash with source/drain multi-sharing
11/16/2004	US6818511 Non-volatile memory device to protect floating gate from charge loss and method for fabricating the same
11/16/2004	US6818510 Non-volatile memory device and method for fabricating the same
11/16/2004	US6818509 Methods of fabricating electrically erasable programmable read-only memory (EEPROM) devices including multilayer sense and select transistor gates
11/16/2004	US6818508 Non-volatile semiconductor memory device and manufacturing method thereof
11/16/2004	US6818507 Method of manufacturing semiconductor device including memory region and logic circuit region
11/16/2004	US6818506 Method of forming a gate electrode in a semiconductor device
11/16/2004	US6818505 Non-volatile semiconductor memory device and manufacturing method thereof
11/16/2004	US6818504 Processes and structures for self-aligned contact non-volatile memory with peripheral transistors easily modifiable for various technologies and applications
11/16/2004	US6818503 Method for fabricating a semiconductor memory device
11/16/2004	US6818502 Method for forming capacitor
11/16/2004	US6818501 Method of making a self-aligned recessed container cell capacitor
11/16/2004	US6818500 Method of making a memory cell capacitor with Ta2O5 dielectric
11/16/2004	US6818499 Method for forming an MIM capacitor
11/16/2004	US6818498 Capacitance element and method of manufacturing the same
11/16/2004	US6818497 Method for fabricating capacitor using electrochemical deposition
11/16/2004	US6818496 Silicon on insulator DRAM process utilizing both fully and partially depleted devices
11/16/2004	US6818495 Method for forming high purity silicon oxide field oxide isolation region
11/16/2004	US6818494 LDMOS and CMOS integrated circuit and method of making
11/16/2004	US6818493 Selective metal oxide removal performed in a reaction chamber in the absence of RF activation
11/16/2004	US6818492 Semiconductor device and manufacturing method thereof
11/16/2004	US6818491 Set of three level concurrent word line bias conditions for a NOR type flash memory array
11/16/2004	US6818490 Method of fabricating complementary high-voltage field-effect transistors
11/16/2004	US6818489 Semiconductor device having LDD-type source/drain regions and fabrication method thereof
11/16/2004	US6818488 Process for making a gate for a short channel CMOS transistor structure
11/16/2004	US6818487 Self-aligned, planarized thin-film transistors, devices employing the same, and methods of fabrication thereof
11/16/2004	US6818486 Method of electronic component fabrication and an electronic component
11/16/2004	US6818484 Method of forming predominantly <100> polycrystalline silicon thin film transistors
11/16/2004	US6818483 Large area, fast frame rate charge coupled device
11/16/2004	US6818482 Method for trench isolation for thyristor-based device
11/16/2004	US6818480 Method of forming a pattern of a semiconductor device and photomask therefor
11/16/2004	US6818476 Insert-moldable heat spreader, semiconductor device using same, and method for manufacturing such semiconductor device
11/16/2004	US6818475 Wafer level package and the process of the same
11/16/2004	US6818474 Method for manufacturing stacked chip package
11/16/2004	US6818473 Method for fabricating ceramic chip packages
11/16/2004	US6818467 P-type ohmic electrode in gallium nitride based optical device and fabrication method thereof
11/16/2004	US6818464 Double-sided etching technique for providing a semiconductor structure with through-holes, and a feed-through metalization process for sealing the through-holes
11/16/2004	US6818463 Vapor-phase growth method for a nitride semiconductor and a nitride semiconductor device
11/16/2004	US6818461 Method of producing mounting structure and mounting structure produced by the same
11/16/2004	US6818460 Method for applying adhesives to a lead frame
11/16/2004	US6818459 Methods and systems for determining a presence of macro defects and overlay of a specimen
11/16/2004	US6818457 Semiconductor integrated circuit device and method of manufacturing the same
11/16/2004	US6818387 Method of forming a pattern
11/16/2004	US6818384 Methods of fabricating microelectronic features by forming intermixed layers of water-soluble resins and resist materials
11/16/2004	US6818383 Method for forming a resist pattern and method for manufacturing a semiconductor device
11/16/2004	US6818381 Underlayer compositions for multilayer lithographic processes
11/16/2004	US6818380 Decreasing number of defects by using photoresist of aqueous solution of tetramethylammonium hydroxide
11/16/2004	US6818375 Photoresist composition
11/16/2004	US6818319 Buffer layer as a diffusion barrier layer is deposited between the silicon film and the glass substrate to obstruct the diffusion of the impurities
11/16/2004	US6818318 Underfill sealant of epoxy resins, adhesion promotor and curative of N-containing compound and transition metal complex
11/16/2004	US6818289 Mesoporous films having reduced dielectric constants
11/16/2004	US6818197 Epitaxial wafer
11/16/2004	US6818142 Potassium hydrogen peroxymonosulfate solutions
11/16/2004	US6818141 Forming carbide and nitride antireflective coating (arc) that can be stripped without damage
11/16/2004	US6818140 Low ceiling temperature process for a plasma reactor with heated source of a polymer-hardening precursor material
11/16/2004	US6818139 Method for forming a micro-pattern on a substrate
11/16/2004	US6818137 Fabrication of electronic magnetic, optical, chemical, and mechanical systems using chemical endpoint detection
11/16/2004	US6818108 Chamber for the transport of workpieces in a vacuum atmosphere, a chamber combination and a method for transporting a workpiece
11/16/2004	US6818104 Anodizing apparatus
11/16/2004	US6818097 Highly heat-resistant plasma etching electrode and dry etching device including the same
11/16/2004	US6818095 Chemical mechanical polishing apparatus
11/16/2004	US6818067 Processing chamber for atomic layer deposition processes
11/16/2004	US6818066 Method and apparatus for treating a substrate
11/16/2004	US6818064 Photoresist dispense arrangement by compensation for substrate reflectivity
11/16/2004	US6818061 Method for growing single crystal GaN on silicon
11/16/2004	US6818059 Method of crystallizing amorphous silicon layer and crystallizing apparatus thereof
11/16/2004	US6818031 Polishing composition
11/16/2004	US6817926 Polishing pad and method of use thereof
11/16/2004	US6817923 Chemical mechanical processing system with mobile load cup
11/16/2004	US6817903 Process for reducing leakage in an integrated circuit with shallow trench isolated active areas
11/16/2004	US6817854 Mold with compensating base
11/16/2004	US6817823 Method, device and system for semiconductor wafer transfer
11/16/2004	US6817822 Load port, wafer processing apparatus, and method of replacing atmosphere
11/16/2004	US6817821 Wafer handling for a reflow tool
11/16/2004	US6817790 Substrate processing method and substrate processing apparatus

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