| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
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| 01/25/2007 | US20070020933 Method of cleaning treatment and method for manufacturing semiconductor device |
| 01/25/2007 | US20070020932 Manufacturing method of wiring board and semiconductor device |
| 01/25/2007 | US20070020931 Manufacture method for semiconductor device having improved copper diffusion preventive function of plugs and wirings made of copper or copper alloy and semiconductor device of this kind |
| 01/25/2007 | US20070020930 Semiconductor device fabricated by a method of reducing the contact resistance of the connection regions |
| 01/25/2007 | US20070020929 Method for reducing dendrite formation in nickel silicon salicide processes |
| 01/25/2007 | US20070020928 Multi-layer interconnect with isolation layer |
| 01/25/2007 | US20070020927 Manufacturing method for electronic substrate, manufacturing method for electro-optical device, and manufacturing method for electronic device |
| 01/25/2007 | US20070020926 Electrical connections in substrates |
| 01/25/2007 | US20070020925 Method of forming a nickel platinum silicide |
| 01/25/2007 | US20070020924 Tungsten nitride atomic layer deposition processes |
| 01/25/2007 | US20070020923 ALD formed titanium nitride films |
| 01/25/2007 | US20070020922 Method of depositing a metal seed layer on semiconductor substrates |
| 01/25/2007 | US20070020921 Prevention of trench photoresist scum |
| 01/25/2007 | US20070020920 Method for fabricating low leakage interconnect layers in integrated circuits |
| 01/25/2007 | US20070020919 Preamorphization to minimize void formation |
| 01/25/2007 | US20070020918 Substrate processing method and substrate processing apparatus |
| 01/25/2007 | US20070020917 Methods for Forming Macroporous Monolithic Methylsilsesquioxanes |
| 01/25/2007 | US20070020915 MMIC having back-side multi-layer signal routing |
| 01/25/2007 | US20070020914 Circuit substrate and method of manufacturing the same |
| 01/25/2007 | US20070020913 Method of forming solder bump with reduced surface defects |
| 01/25/2007 | US20070020912 Semiconductor element and a producing method for the same, and a semiconductor device and a producing method for the same |
| 01/25/2007 | US20070020911 Self alignment features for an electronic assembly |
| 01/25/2007 | US20070020910 Photoresist stripper composition and methods for forming wire structures and for fabricating thin film transistor substrate using composition |
| 01/25/2007 | US20070020909 Forming of conductive bumps for an integrated circuit |
| 01/25/2007 | US20070020908 Multilayer structure having a warpage-compensating layer |
| 01/25/2007 | US20070020907 Method of forming a connecting conductor and wirings of a semiconductor chip |
| 01/25/2007 | US20070020906 Method for forming high reliability bump structure |
| 01/25/2007 | US20070020905 Low resistance contact in a semiconductor device |
| 01/25/2007 | US20070020904 Selectively filling microelectronic features |
| 01/25/2007 | US20070020903 Hybrid PVD-CVD system |
| 01/25/2007 | US20070020902 Transistor for semiconductor device and method of forming the same |
| 01/25/2007 | US20070020901 Method for manufacturing semiconductor device |
| 01/25/2007 | US20070020900 Highly doped gate electrode made by rapidly melting and resolidifying the gate electrode |
| 01/25/2007 | US20070020899 Forming method for film pattern, device, electro-optical apparatus, electronic apparatus, and manufacturing method for active matrix substrate |
| 01/25/2007 | US20070020898 System and method for semiconductor processing |
| 01/25/2007 | US20070020897 Manufacturing method of semiconductor device |
| 01/25/2007 | US20070020896 Semiconductor device and method for fabricating the same |
| 01/25/2007 | US20070020895 Method for production of a very thin layer with thinning by means of induced self-support |
| 01/25/2007 | US20070020894 Method for preparing atomistically straight boundary junctions in high temperature superconducting oxides |
| 01/25/2007 | US20070020893 Low defect epitaxial semiconductor substrate having gettering function, image sensor using the same, and fabrication method thereof |
| 01/25/2007 | US20070020892 Method of fabricating semiconductor device using selective epitaxial growth |
| 01/25/2007 | US20070020891 Gesn alloys and ordered phases with direct tunable bandgaps grown directly on silicon |
| 01/25/2007 | US20070020890 Method and apparatus for semiconductor processing |
| 01/25/2007 | US20070020889 Method for manufacturing semiconductor device |
| 01/25/2007 | US20070020888 Semiconductor device and method of manufacturing the same |
| 01/25/2007 | US20070020887 Processing method and grinding apparatus of wafer |
| 01/25/2007 | US20070020886 Method for reducing the trap density in a semiconductor wafer |
| 01/25/2007 | US20070020885 Tube Formed of Bonded Silicon Staves |
| 01/25/2007 | US20070020884 Semiconductor structures formed on substrates and methods of manufacturing the same |
| 01/25/2007 | US20070020883 Patterned structures fabricated by printing mask over lift-off pattern |
| 01/25/2007 | US20070020882 Method of manufacturing transistor having recessed channel |
| 01/25/2007 | US20070020881 Methods of forming trench isolation in the fabrication of integrated circuitry, methods of fabricating memory circuitry, integrated circuitry and memory integrated circuitry |
| 01/25/2007 | US20070020880 Method of fabricating a semiconductor device and a method of generating a mask pattern |
| 01/25/2007 | US20070020879 Method of forming an isolation layer and method of manufacturing a field effect transistor using the same |
| 01/25/2007 | US20070020878 Method for fabricating a metal-insulator-metal capacitor |
| 01/25/2007 | US20070020877 Shallow trench isolation structure and method of fabricating the same |
| 01/25/2007 | US20070020876 Integrated circuitry, dynamic random access memory cells, electronic systems, and semiconductor processing methods |
| 01/25/2007 | US20070020875 Seamless trench fill method utilizing sub-atmospheric pressure chemical vapor deposition technique |
| 01/25/2007 | US20070020874 Method for controlling dislocation positions in silicon germanium buffer layers |
| 01/25/2007 | US20070020873 Method of manufacturing composite wafer structure |
| 01/25/2007 | US20070020872 Process and apparatus for producing single crystal |
| 01/25/2007 | US20070020871 Three dimensional IC device and alignment methods of IC device substrates |
| 01/25/2007 | US20070020870 Semiconductor capacitor structure and method to form same |
| 01/25/2007 | US20070020869 Method for manufacturing capacitor for semiconductor device |
| 01/25/2007 | US20070020868 Semiconductor processing method and field effect transistor |
| 01/25/2007 | US20070020867 Buried stress isolation for high-performance CMOS technology |
| 01/25/2007 | US20070020866 CMOS transistor with high drive current and low sheet resistance |
| 01/25/2007 | US20070020865 Multi-work function gates for CMOS circuit and method of manufacture |
| 01/25/2007 | US20070020864 Method and structure to prevent silicide strapping of source/drain to body in semiconductor devices with source/drain stressor |
| 01/25/2007 | US20070020863 LDMOS Transistor |
| 01/25/2007 | US20070020862 Semiconductor device and method of fabricating the same |
| 01/25/2007 | US20070020861 Method to engineer etch profiles in Si substrate for advanced semiconductor devices |
| 01/25/2007 | US20070020860 Method for Making Semiconductor Device Including a Strained Superlattice and Overlying Stress Layer and Related Methods |
| 01/25/2007 | US20070020859 Method of making non-volatile field effect devices and arrays of same |
| 01/25/2007 | US20070020858 Layout structure of MOS transistors and methods of disposing MOS transistors on an active region |
| 01/25/2007 | US20070020857 Process for forming an electronic device including discontinuous storage elements |
| 01/25/2007 | US20070020856 Process for forming an electronic device including discontinuous storage elements |
| 01/25/2007 | US20070020855 Semiconductor device having vertical channels and method of manufacturing the same |
| 01/25/2007 | US20070020854 Be-directional read/program non-volatile floating gate memory cell with independent controllable control gates, and array thereof, and method of formation |
| 01/25/2007 | US20070020853 Bidirectional split gate NAND flash memory structure and array, method of programming, erasing and reading thereof, and method of manufacturing |
| 01/25/2007 | US20070020852 Semiconductor memory device with a stacked gate including a floating gate and a control gate |
| 01/25/2007 | US20070020851 Hot carrier injection programmable structure including discontinuous storage elements and spacer control gates in a trench and a method of using the same |
| 01/25/2007 | US20070020850 Method for manufacturing semiconductor device and semiconductor device |
| 01/25/2007 | US20070020849 Source side injection storage device with spacer gates and method therefor |
| 01/25/2007 | US20070020848 Method for fabricating semiconductor device |
| 01/25/2007 | US20070020847 Method for fabricating flash memory device |
| 01/25/2007 | US20070020846 Flash memory device and method for fabricating the same |
| 01/25/2007 | US20070020845 Method of fabricating programmable structure including discontinuous storage elements and spacer control gates in a trench |
| 01/25/2007 | US20070020844 Method for fabricating bit line of memory device |
| 01/25/2007 | US20070020843 Method of producing a chip-type solid electrolytic capacitor |
| 01/25/2007 | US20070020842 Method of manufacturing mask ROM |
| 01/25/2007 | US20070020841 Method of manufacturing gate structure and method of manufacturing semiconductor device including the same |
| 01/25/2007 | US20070020840 Programmable structure including nanocrystal storage elements in a trench |
| 01/25/2007 | US20070020839 Methods to selectively protect NMOS regions, PMOS regions, and gate layers during EPI process |
| 01/25/2007 | US20070020838 Undercut and residual spacer prevention for dual stressed layers |
| 01/25/2007 | US20070020837 High performance capacitors in planar back gates cmos |
| 01/25/2007 | US20070020836 Method for manufacturing thin film transistor substrate |
| 01/25/2007 | US20070020835 Atomic layer deposition of CeO2/Al2O3 films as gate dielectrics |
| 01/25/2007 | US20070020834 Method for forming film pattern, and method for manufacturing device, electro-optical device, electronic apparatus and active matrix substrate |
| 01/25/2007 | US20070020833 Method for Making a Semiconductor Device Including a Channel with a Non-Semiconductor Layer Monolayer |