Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
01/2007
01/30/2007US7170579 Light source unit, exposure apparatus, and device manufacturing method
01/30/2007US7170576 Thin film transistor array substrate and fabricating method thereof
01/30/2007US7170573 Array substrate for transflective liquid crystal display device and method for manufacturing the same
01/30/2007US7170571 Liquid crystal display device with double metal layer source and drain electrodes and fabricating method thereof
01/30/2007US7170327 System and method for data retention with reduced leakage current
01/30/2007US7170309 TDDB test pattern and method for testing TDDB of MOS capacitor dielectric
01/30/2007US7170276 Device for compensating for heat deviation in a modular IC test handler
01/30/2007US7170184 Treatment of a ground semiconductor die to improve adhesive bonding to a substrate
01/30/2007US7170182 Semiconductor device with reduced interconnect capacitance
01/30/2007US7170177 Semiconductor apparatus
01/30/2007US7170176 Semiconductor device
01/30/2007US7170175 Semiconductor device and production method thereof
01/30/2007US7170172 Semiconductor device having a roughened surface
01/30/2007US7170171 Support ring for use with a contact pad and semiconductor device components including the same
01/30/2007US7170170 Bump for semiconductor package, semiconductor package applying the bump, and method for fabricating the semiconductor package
01/30/2007US7170164 Cooling system for a semiconductor device and method of fabricating same
01/30/2007US7170161 In-process semiconductor packages with leadframe grid arrays
01/30/2007US7170158 Double-sided circuit board and multi-chip package including such a circuit board and method for manufacture
01/30/2007US7170153 Semiconductor device and its manufacturing method
01/30/2007US7170152 Wafer level semiconductor package with build-up layer and method for fabricating the same
01/30/2007US7170149 Semiconductor device and package, and method of manufacture therefor
01/30/2007US7170145 Method of manufacturing semiconductor device, flexible substrate, and semiconductor device
01/30/2007US7170141 Method for monolithically integrating silicon carbide microelectromechanical devices with electronic circuitry
01/30/2007US7170139 Semiconductor constructions
01/30/2007US7170138 Semiconductor device
01/30/2007US7170137 Semiconductor device and method of manufacturing the same
01/30/2007US7170134 Semiconductor device
01/30/2007US7170133 Transistor and method of fabricating the same
01/30/2007US7170132 Twin insulator charge storage device operation and its fabrication method
01/30/2007US7170131 Flash memory array with increased coupling between floating and control gates
01/30/2007US7170130 Memory cell with reduced DIBL and Vss resistance
01/30/2007US7170127 Semiconductor device and fabricating method thereof
01/30/2007US7170126 Structure of vertical strained silicon devices
01/30/2007US7170125 Capacitor with electrodes made of ruthenium and method for patterning layers made of ruthenium or ruthenium
01/30/2007US7170124 Trench buried bit line memory devices and methods thereof
01/30/2007US7170123 Antiferromagnetically stabilized pseudo spin valve for memory applications
01/30/2007US7170122 Ferroelectric polymer memory with a thick interface layer
01/30/2007US7170117 Image sensor with improved dynamic range and method of formation
01/30/2007US7170114 Semiconductor device
01/30/2007US7170113 Semiconductor device and method of manufacturing the same
01/30/2007US7170112 Graded-base-bandgap bipolar transistor having a constant—bandgap in the base
01/30/2007US7170111 Nitride heterojunction transistors having charge-transfer induced energy barriers and methods of fabricating the same
01/30/2007US7170110 Semiconductor device and method for fabricating the same
01/30/2007US7170109 Heterojunction semiconductor device with element isolation structure
01/30/2007US7170106 Power semiconductor device
01/30/2007US7170103 Wafer with vertical diode structures
01/30/2007US7170102 Semiconductor laser device and fabrication method thereof
01/30/2007US7170101 Nitride-based semiconductor light-emitting device and manufacturing method thereof
01/30/2007US7170098 Electronic assembly including a die having an integrated circuit and a layer of diamond to transfer heat
01/30/2007US7170095 Semi-insulating GaN and method of making the same
01/30/2007US7170092 Flat panel display and fabrication method thereof
01/30/2007US7170090 Method and structure for testing metal-insulator-metal capacitor structures under high temperature at wafer level
01/30/2007US7170089 (4,5,9,10-Tetrahydro-pyren-2-yl)-carbamic acid 4-(2-methylsulfanyl-alkyl)-3,5-dinitro-benzyl ester, method of synthesizing thereof, and molecular electronic device using the same
01/30/2007US7170088 Organic thin film transistor and flat panel display comprising the same
01/30/2007US7170084 Strained silicon MOSFET having improved source/drain extension dopant diffusion resistance and method for its fabrication
01/30/2007US7170062 Conductive adhesive bonded semiconductor substrates for radiation imaging devices
01/30/2007US7170036 Apparatus and method for heating and cooling an article
01/30/2007US7170029 Method and apparatus for deflashing of integrated circuit packages
01/30/2007US7170012 Multilayer circuit board, process of manufacturing same, board for multilayer circuitry, and electronic apparatus
01/30/2007US7170001 Fabrication of back-contacted silicon solar cells using thermomigration to create conductive vias
01/30/2007US7169989 Applying an enzyme for the selective removal of sub-unit parts of the polymer to at least one predetermined area of said polymeric substrate via a pipette with a nano-sized orifice
01/30/2007US7169869 A fluorinated vinyl sulfonate-polyalkenamer-acrylic acid or ester terpolymer with excellent transparency, substrate adhesion, developer penetrability, and plasma etch resistance; lithographic microprocessing; photoresists
01/30/2007US7169717 Method of producing a calibration wafer
01/30/2007US7169716 Photosensitive lacquer for providing a coating on a semiconductor substrate or a mask
01/30/2007US7169715 Forming a dielectric layer using porogens
01/30/2007US7169714 Method and structure for graded gate oxides on vertical and non-planar surfaces
01/30/2007US7169713 Atomic layer deposition (ALD) method with enhanced deposition rate
01/30/2007US7169712 Method for manufacturing a microlens
01/30/2007US7169711 Method of using carbon spacers for critical dimension (CD) reduction
01/30/2007US7169710 Wiring and method of manufacturing the same, and wiring board and method of manufacturing the same
01/30/2007US7169709 Laser etching method and apparatus therefor
01/30/2007US7169708 Semiconductor device fabrication method
01/30/2007US7169707 Anodizing a metal core opened through a masking process, oxidation layers insulate portions of circuit pattern from each other; electroplating portions provided between the oxidation layers with copper or filling conductive paste between; fine circuit pattern is achieved
01/30/2007US7169706 Method of using an adhesion precursor layer for chemical vapor deposition (CVD) copper deposition
01/30/2007US7169705 Plating method and plating apparatus
01/30/2007US7169704 Method of cleaning a surface of a water in connection with forming a barrier layer of a semiconductor device
01/30/2007US7169703 Forming an adsorbed molecular layer of organometallic compound on the layer-stacked plate, reducing the concentration of the organometallic compound in the gas, light irradiation against a selected region to form the metallization area, removing compound from non-selected area; integrated circuits
01/30/2007US7169702 Reacting 2,2-bis(4-hydroxyphenyl)propane of high purity having little 2-(4-hydroxyphenyl)-2-(2-hydroxyphenyl)propane and 2,2-bis(2-hydroxyphenyl)propane with a diaryl sulfone, and injection molding the low yellowing polysulfone at give temperature; use as ophthalmic lenses
01/30/2007US7169701 Dual damascene trench formation to avoid low-K dielectric damage
01/30/2007US7169700 Metal interconnect features with a doping gradient
01/30/2007US7169699 Semiconductor device having a guard ring
01/30/2007US7169698 Sacrificial inorganic polymer intermetal dielectric damascene wire and via liner
01/30/2007US7169697 Semiconductor device and manufacturing method of the same
01/30/2007US7169696 Method for making a system for selecting one wire from a plurality of wires
01/30/2007US7169695 Method for forming a dual damascene structure
01/30/2007US7169694 Method for forming a bond pad interface
01/30/2007US7169693 Collar positionable about a periphery of a contact pad and around a conductive structure secured to the contact pads, semiconductor device components including same, and methods for fabricating same
01/30/2007US7169692 Method and apparatus to eliminate galvanic corrosion on copper doped aluminum bond pads on integrated circuits
01/30/2007US7169691 Method of fabricating wafer-level packaging with sidewall passivation and related apparatus
01/30/2007US7169690 Method of producing crystalline semiconductor material and method of fabricating semiconductor device
01/30/2007US7169689 Method of manufacturing a semiconductor device
01/30/2007US7169688 Method and apparatus for cutting devices from substrates
01/30/2007US7169687 Laser micromachining method
01/30/2007US7169686 Apparatus includes a device for directing a pulse of energy into a substrate to pass through a weakened zone in the substrate, and cause cleavage of the substrate; weakened zone can be from ion implantation for example; cutting electronic, optoelectronic, optical component or sensor substrate
01/30/2007US7169685 Wafer back side coating to balance stress from passivation layer on front of wafer and be used as die attach adhesive
01/30/2007US7169684 Device having inductors and capacitors and a fabrication method thereof
01/30/2007US7169683 Preventive treatment method for a multilayer semiconductor structure
01/30/2007US7169682 Method for manufacturing semiconductor device
01/30/2007US7169681 Method of forming dual gate dielectric layer
01/30/2007US7169680 Method for fabricating a metal-insulator-metal capacitor