Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
02/2007
02/20/2007US7179714 Method of fabricating MOS transistor having fully silicided gate
02/20/2007US7179713 Method of fabricating a fin transistor
02/20/2007US7179712 Multibit ROM cell and method therefor
02/20/2007US7179711 Non-volatile semiconductor memory and method of making same, and semiconductor device and method of making device
02/20/2007US7179710 Method for fabricating NAND type dual bit nitride read only memory
02/20/2007US7179709 Method of fabricating non-volatile memory device having local SONOS gate structure
02/20/2007US7179708 Process for fabricating non-volatile memory by tilt-angle ion implantation
02/20/2007US7179707 Method of forming gate electrode in semiconductor device
02/20/2007US7179706 Permeable capacitor electrode
02/20/2007US7179705 Ferroelectric capacitor and its manufacturing method, and ferroelectric memory device
02/20/2007US7179704 Methods of forming capacitors with high dielectric layers and capacitors so formed
02/20/2007US7179703 Method of forming shallow doped junctions having a variable profile gradation of dopants
02/20/2007US7179702 Semiconductor device including metal insulator semiconductor field effect transistor and method of manufacturing the same
02/20/2007US7179701 Transistor with high dielectric constant gate and method for forming the same
02/20/2007US7179700 Semiconductor device with low resistance contacts
02/20/2007US7179699 Method of fabricating semiconductor device
02/20/2007US7179698 Laser apparatus, laser annealing method, and manufacturing method of a semiconductor device
02/20/2007US7179697 Method of fabricating an electronic device
02/20/2007US7179696 Phosphorus activated NMOS using SiC process
02/20/2007US7179695 Method of forming wiring
02/20/2007US7179694 Semiconductor device, electro-optical device, integrated circuit and electronic equipment
02/20/2007US7179693 Method for manufacturing thin film device that includes a chemical etchant process
02/20/2007US7179692 Method of manufacturing a semiconductor device having a fin structure
02/20/2007US7179691 Method for four direction low capacitance ESD protection
02/20/2007US7179690 High reliability triple redundant latch with voting logic on each storage node
02/20/2007US7179689 Package stress management
02/20/2007US7179688 Method for reducing or eliminating semiconductor device wire sweep in a multi-tier bonding device and a device produced by the method
02/20/2007US7179687 Semiconductor device and its manufacturing method, and semiconductor device manufacturing system
02/20/2007US7179686 Manufacturing method of semiconductor device
02/20/2007US7179685 Fabrication method for stacked multi-chip package
02/20/2007US7179684 Microelectronic or optoelectronic package having a polybenzoxazine-based film as an underfill material
02/20/2007US7179683 Substrate grooves to reduce underfill fillet bridging
02/20/2007US7179682 Packaged device and method of forming same
02/20/2007US7179681 Techniques for packaging multiple device components
02/20/2007US7179680 Method for producing an optoelectronic component
02/20/2007US7179678 EBIC response enhancement in type III-VI semiconductor material on silicon
02/20/2007US7179676 Manufacturing CCDs in a conventional CMOS process
02/20/2007US7179675 Method for fabricating image sensor
02/20/2007US7179674 Bi-directional released-beam sensor
02/20/2007US7179673 Method of fabricating liquid crystal display device
02/20/2007US7179672 Light-emitting device and method for manufacturing the same
02/20/2007US7179671 Light emitting element, method of manufacturing the same, and semiconductor device having light emitting element
02/20/2007US7179670 Flip-chip light emitting diode device without sub-mount
02/20/2007US7179669 Tunable semiconductor laser and method thereof
02/20/2007US7179668 Technique for manufacturing silicon structures
02/20/2007US7179667 Semiconductor base material and method of manufacturing the material
02/20/2007US7179666 Method for manufacturing an electronic circuit device and electronic circuit device
02/20/2007US7179665 Optical method for determining the doping depth profile in silicon
02/20/2007US7179664 Method for generating work-in-process schedules
02/20/2007US7179663 CDA controller and method for stabilizing dome temperature
02/20/2007US7179662 Semiconductor fuse covering
02/20/2007US7179661 Chemical mechanical polishing test structures and methods for inspecting the same
02/20/2007US7179584 Exposure method and device for forming patterns on printed wiring board
02/20/2007US7179581 Resist composition and patterning process
02/20/2007US7179579 Radiation-sensitive composition
02/20/2007US7179569 Method for manufacturing a semiconductor device, stencil mask and method for manufacturing the same
02/20/2007US7179567 Phase shift mask blank, phase shift mask, and method of manufacture
02/20/2007US7179537 Spin-on glass composition and method of forming silicon oxide layer in semiconductor manufacturing process using the same
02/20/2007US7179520 Circuit substrate, electro-optic device and electronic equipment
02/20/2007US7179504 Coating using discharging nozzle; depressurization to dry
02/20/2007US7179503 Placing the metal film precursor on an organic film to produce a transfer sheet, contacting the surface with a substrate, and heating the sheet to decompose the film and the precursor and join the metal ultrafine particles
02/20/2007US7179399 Material for forming protective film
02/20/2007US7179398 Etchant for wires, a method for manufacturing the wires using the etchant, a thin film transistor array substrate and a method for manufacturing the same including the method
02/20/2007US7179397 Plasma processing methods and apparatus
02/20/2007US7179396 Positive tone bi-layer imprint lithography method
02/20/2007US7179394 Method for manufacturing liquid crystal display
02/20/2007US7179361 Method of forming a mass over a semiconductor substrate
02/20/2007US7179359 Cup-shaped plating apparatus
02/20/2007US7179346 Semiconductor apparatus with multiple delivery devices for components
02/20/2007US7179334 System and method for performing semiconductor processing on substrate being processed
02/20/2007US7179329 Methods of hyperdoping semiconductor materials and hyperdoped semiconductor materials and devices
02/20/2007US7179309 Surface mount chip capacitor
02/20/2007US7179148 Cathode with improved work function and method for making the same
02/20/2007US7179044 Method of removing substrates from a storage site and a multiple substrate batch loader
02/20/2007US7179000 Method of developing a resist film and a resist development processor
02/20/2007US7178779 Resin molding die and production method for semiconductor devices using the same
02/20/2007US7178393 Measuring apparatus and method for thin board
02/20/2007US7178236 Method for constructing a membrane probe using a depression
02/20/2007US7178233 Process for producing a collapsed filled via hole
02/17/2007CA2555394A1 Power semiconductor packaging method and structure
02/15/2007WO2007019500A1 Copper conductor annealing process employing high speed optical annealing with a low temperature-deposited optical absorber layer
02/15/2007WO2007019455A2 Copper barrier reflow process employing high speed optical annealing
02/15/2007WO2007019449A1 In-situ atomic layer deposition
02/15/2007WO2007019277A2 Method of forming semiconductor layers on handle substrates
02/15/2007WO2007019260A1 Strained silicon on insulator (ssoi) structure with improved crystallinity in the strained silicon layer
02/15/2007WO2007019199A1 Methods of forming through-wafer interconnects and structures resulting therefrom
02/15/2007WO2007019188A2 Manufacture of photovoltaic devices
02/15/2007WO2007019105A1 A transfer container
02/15/2007WO2007019103A2 Method and apparatus for sorting particles with a mems device
02/15/2007WO2007019067A1 Apparatus and method for depositing functional blocks
02/15/2007WO2007019049A2 Edge ring assembly with dielectric spacer ring
02/15/2007WO2007019046A1 Sonos memory cell having high-k dielectric
02/15/2007WO2007019027A1 Memory device with barrier layer
02/15/2007WO2007018968A1 METHODS OF FORMING CoSi2, METHODS OF FORMING FIELD EFFECT TRANSISTORS, AND METHODS OF FORMING CONDUCTIVE CONTACTS
02/15/2007WO2007018967A2 Methods of forming memory circuitry with different insulative sidewall spacers
02/15/2007WO2007018918A2 Nitride-based transistors and fabrication methods with an etch stop layer
02/15/2007WO2007018850A2 Fabrication of three dimensional integrated circuit employing multiple die panels
02/15/2007WO2007018813A2 Wide and narrow trench formation in high aspect ratio mems
02/15/2007WO2007018812A2 Semiconductor devices and method of fabrication
02/15/2007WO2007018811A2 Magnetic tunnel junction sensor method