Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
02/2007
02/13/2007US7176554 Methods for producing a semiconductor entity
02/13/2007US7176553 Integrated resistive elements with silicidation protection
02/13/2007US7176550 Method and device for forming a winding on a non-planar substrate
02/13/2007US7176549 Shallow trench isolation using low dielectric constant insulator
02/13/2007US7176548 Complementary analog bipolar transistors with trench-constrained isolation diffusion
02/13/2007US7176545 Apparatus and methods for maskless pattern generation
02/13/2007US7176540 Method for producing micromechanical structures and a micromechanical structure
02/13/2007US7176538 High voltage MOSFET having doped buried layer
02/13/2007US7176536 Semiconductor device having metal silicide layer on source/drain region and gate electrode and method of manufacturing the same
02/13/2007US7176535 Thin film transistor array gate electrode for liquid crystal display device
02/13/2007US7176534 Low resistance T-gate MOSFET device using a damascene gate process and an innovative oxide removal etch
02/13/2007US7176533 Semiconductor devices having contact plugs including polysilicon doped with an impurity having a lesser diffusion coefficient than phosphorus
02/13/2007US7176531 CMOS gates formed by integrating metals having different work functions and having a high-k gate dielectric
02/13/2007US7176529 Semiconductor device and method of manufacturing the same
02/13/2007US7176528 Glass-based SOI structures
02/13/2007US7176527 Semiconductor device and method of fabricating same
02/13/2007US7176526 Semiconductor device, method for producing the same, and information processing apparatus
02/13/2007US7176525 Process for production of SOI substrate and process for production of semiconductor device
02/13/2007US7176523 Power mosfet having conductor plug structured contacts
02/13/2007US7176522 Semiconductor device having high drive current and method of manufacturing thereof
02/13/2007US7176520 Semiconductor device and a method of manufacturing the same
02/13/2007US7176519 Memory cell, memory cell arrangement and method for the production of a memory cell
02/13/2007US7176517 Flash memories and methods of fabricating the same
02/13/2007US7176516 Structure and fabricating method to make a cell with multi-self-alignment in split gate flash
02/13/2007US7176515 Semiconductor device including insulated gate type transistor and insulated gate type capacitance having protruded portions
02/13/2007US7176514 Method and configuration for reinforcement of a dielectric layer at defects by self-aligning and self-limiting electrochemical conversion of a substrate material
02/13/2007US7176513 Memory cell and method for forming the same
02/13/2007US7176512 Semiconductor memory device having high electrical performance and mask and photolithography friendliness
02/13/2007US7176511 Semiconductor memory device and method of manufacturing the same
02/13/2007US7176510 Thin film capacitor
02/13/2007US7176509 Semiconductor device and method for manufacturing the same
02/13/2007US7176499 Method of manufacturing a semiconductor light emitting device, semiconductor light emitting device, method of manufacturing a semiconductor device, semiconductor device, method of manufacturing a device, and device
02/13/2007US7176497 Group III nitride compound semiconductor
02/13/2007US7176496 Thin film transistor array panels for a liquid crystal display and a method for manufacturing the same
02/13/2007US7176494 Thin film transistor for liquid crystal display and method of manufacturing the same
02/13/2007US7176493 Active matrix display device and manufacturing method thereof
02/13/2007US7176491 Semiconductor device
02/13/2007US7176490 Semiconductor device
02/13/2007US7176489 Thin-film transistor and method of making same
02/13/2007US7176488 Thin film transistor with protective cap over flexible substrate, electronic device using the same, and manufacturing method thereof
02/13/2007US7176487 Semiconductor integrated circuit
02/13/2007US7176486 Structure of test element group wiring and semiconductor substrate
02/13/2007US7176483 Method for depinning the Fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
02/13/2007US7176479 Nitride compound semiconductor element
02/13/2007US7176452 Microfabricated beam modulation device
02/13/2007US7176422 Chip bonding heater with differential heat transfer
02/13/2007US7176420 Resistive heaters and uses thereof
02/13/2007US7176417 Apparatuses and methods for resistively heating a thermal processing system
02/13/2007US7176407 Method and system for precisely positioning a waist of a material-processing laser beam to process microstructures within a laser-processing site
02/13/2007US7176403 Method and apparatus for the compensation of edge ring wear in a plasma processing chamber
02/13/2007US7176337 Process for producing perfluorocarbons and use thereof
02/13/2007US7176173 Washing liquid for semiconductor substrate and method of producing semiconductor device
02/13/2007US7176147 Combination insulator and organic semiconductor formed from self-assembling block co-polymers
02/13/2007US7176146 Method of making a molecule-surface interface
02/13/2007US7176145 Manufacturing method of semiconductor device
02/13/2007US7176144 Plasma detemplating and silanol capping of porous dielectric films
02/13/2007US7176143 Method for evaluating solution for a coating film for semiconductors
02/13/2007US7176142 Method of manufacturing trench structure for device
02/13/2007US7176141 Plasma treatment to improve barrier layer performance over porous low-K insulating dielectrics
02/13/2007US7176140 Adhesion promotion for etch by-products
02/13/2007US7176139 Etching method in a semiconductor processing and etching system for performing the same
02/13/2007US7176138 Selective nitride liner formation for shallow trench isolation
02/13/2007US7176137 Method for multiple spacer width control
02/13/2007US7176136 Semiconductor device fabrication method
02/13/2007US7176135 EBR shape of spin-on low-k material providing good film stacking
02/13/2007US7176134 Forming method of silicide film
02/13/2007US7176133 Controlled electroless plating
02/13/2007US7176132 Manufacturing method of semiconductor device
02/13/2007US7176131 Electronic component having at least one semiconductor chip and flip-chip contacts, and method for producing the same
02/13/2007US7176130 Plasma treatment for surface of semiconductor device
02/13/2007US7176129 Methods of fabricating highly conductive regions in semiconductor substrates for radio frequency applications
02/13/2007US7176128 Method for fabrication of a contact structure
02/13/2007US7176127 Method of manufacturing semiconductor device having through hole with adhesion layer thereon
02/13/2007US7176126 Method of fabricating dual damascene interconnection
02/13/2007US7176125 Method of forming a static random access memory with a buried local interconnect
02/13/2007US7176124 Method for fabricating electronic device
02/13/2007US7176123 Method for manufacturing metal line of semiconductor device
02/13/2007US7176122 Dielectric with sidewall passivating layer
02/13/2007US7176121 Semiconductor device and manufacturing method thereof
02/13/2007US7176119 Method of fabricating copper damascene and dual damascene interconnect wiring
02/13/2007US7176118 Circuit constructions
02/13/2007US7176117 Method for mounting passive components on wafer
02/13/2007US7176116 High performance FET with laterally thin extension
02/13/2007US7176115 Method of manufacturing Group III nitride substrate and semiconductor device
02/13/2007US7176114 Method of depositing patterned films of materials using a positive imaging process
02/13/2007US7176113 LDC implant for mirrorbit to improve Vt roll-off and form sharper junction
02/13/2007US7176112 Non-thermal annealing with electromagnetic radiation in the terahertz range of doped semiconductor material
02/13/2007US7176111 Method for depositing polycrystalline SiGe suitable for micromachining and devices obtained thereof
02/13/2007US7176110 Technique for forming transistors having raised drain and source regions with different heights
02/13/2007US7176109 Method for forming raised structures by controlled selective epitaxial growth of facet using spacer
02/13/2007US7176108 Method of detaching a thin film at moderate temperature after co-implantation
02/13/2007US7176107 Hybrid substrate and method for fabricating the same
02/13/2007US7176106 Wafer bonding using reactive foils for massively parallel micro-electromechanical systems packaging
02/13/2007US7176105 Dielectric gap fill with oxide selectively deposited over silicon liner
02/13/2007US7176104 Method for forming shallow trench isolation structure with deep oxide region
02/13/2007US7176102 Method for producing SOI wafer and SOI wafer
02/13/2007US7176101 Method of forming isolation oxide layer in semiconductor integrated circuit device
02/13/2007US7176100 Capacitor and its manufacturing method, and semiconductor device
02/13/2007US7176099 Hetero-junction bipolar transistor and manufacturing method thereof
02/13/2007US7176098 Semiconductor element and method for fabricating the same