Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
03/2007
03/06/2007US7187014 Semiconductor device and method for fabricating the same
03/06/2007US7187005 Flat panel display with thin film transistor
03/06/2007US7187003 Thin film transistor array substrate, method for manufacturing the same and system for inspecting the substrate
03/06/2007US7187002 Wafer collective reliability evaluation device and wafer collective reliability evaluation method
03/06/2007US7187001 Organic light emitting display with circuit measuring pad and method of fabricating the same
03/06/2007US7186945 Sprayable adhesive material for laser marking semiconductor wafers and dies
03/06/2007US7186943 MERIE plasma reactor with overhead RF electrode tuned to the plasma with arcing suppression
03/06/2007US7186928 Electronic device including chip parts and a method for manufacturing the same
03/06/2007US7186925 Electronic circuit device and method of manufacturing the same
03/06/2007US7186920 Flexible wiring board, an intermediate product of a flexible wiring board, and a multi-layer flexible wiring board
03/06/2007US7186911 Scoring the coating of a first coated base material at a temperature sufficiently high to part the coating and melt at least a portion of the first base material
03/06/2007US7186835 Composition comprising amino-imine compounds
03/06/2007US7186664 Methods and structures for metal interconnections in integrated circuits
03/06/2007US7186663 High density plasma process for silicon thin films
03/06/2007US7186662 Method for forming a hard mask for gate electrode patterning and corresponding device
03/06/2007US7186661 Method to improve profile control and N/P loading in dual doped gate applications
03/06/2007US7186660 Silicon precursors for deep trench silicon etch processes
03/06/2007US7186659 Introducing an etching gas in an etching chamber wherein a material to be etched is placed, and exciting the etching gas to a plasma state to etch the material to be etched, whereinthe material to be etched is a metal film laminated on an organic film
03/06/2007US7186658 Method and resulting structure for PCMO film to obtain etching rate and mask to selectively by inductively coupled plasma
03/06/2007US7186657 Providing a wafer having a trench, a STI layer formed in the trench, the HfO2-containing gate dielectric covering the wafer and the STI layer, a gate electrode, performing a nitrogen ion bombardment to convert the exposed HfO2-containing gate dielectric to an Hf3N4 layer; utilizing phophoric acid
03/06/2007US7186656 Method of forming a recessed structure employing a reverse tone process
03/06/2007US7186655 Method for manufacturing semiconductor device
03/06/2007US7186654 Chemical mechanical polishing slurry and method of manufacturing semiconductor device by using the same
03/06/2007US7186653 Polishing slurries and methods for chemical mechanical polishing
03/06/2007US7186652 Method for preventing Cu contamination and oxidation in semiconductor device manufacturing
03/06/2007US7186651 Chemical mechanical polishing method and apparatus
03/06/2007US7186650 Control of bottom dimension of tapered contact via variation(s) of etch process
03/06/2007US7186649 Submicron semiconductor device and a fabricating method thereof
03/06/2007US7186648 Barrier first method for single damascene trench applications
03/06/2007US7186647 Method for fabricating semiconductor device having landing plug contact structure
03/06/2007US7186646 Semiconductor devices and methods of forming a barrier metal in semiconductor devices
03/06/2007US7186645 Selective plating of package terminals
03/06/2007US7186644 Methods for preventing copper oxidation in a dual damascene process
03/06/2007US7186643 Barrier-metal-free copper damascene technology using atomic hydrogen enhanced reflow
03/06/2007US7186642 Low temperature nitride used as Cu barrier layer
03/06/2007US7186641 Methods of forming metal interconnection lines in semiconductor devices
03/06/2007US7186640 Silicon-rich oxide for copper damascene interconnect incorporating low dielectric constant dielectrics
03/06/2007US7186639 Metal interconnection lines of semiconductor devices and methods of forming the same
03/06/2007US7186638 Passivation processes for use with metallization techniques
03/06/2007US7186637 Method of bonding semiconductor devices
03/06/2007US7186636 Nickel bonding cap over copper metalized bondpads
03/06/2007US7186634 Method for forming metal single-layer film, method for forming wiring, and method for producing field effect transistors
03/06/2007US7186633 Method and structure for tungsten gate metal surface treatment while preventing oxidation
03/06/2007US7186632 Method of fabricating a semiconductor device having a decreased concentration of phosphorus impurities in polysilicon
03/06/2007US7186631 Method for manufacturing a semiconductor device
03/06/2007US7186630 Deposition of amorphous silicon-containing films
03/06/2007US7186629 Protecting thin semiconductor wafers during back-grinding in high-volume production
03/06/2007US7186628 Method of manufacturing an SOI wafer where COP's are eliminated within the base wafer
03/06/2007US7186627 Method for forming device isolation film of semiconductor device
03/06/2007US7186626 Method for controlling dislocation positions in silicon germanium buffer layers
03/06/2007US7186625 High density MIMCAP with a unit repeatable structure
03/06/2007US7186624 Bipolar transistor with lattice matched base layer
03/06/2007US7186623 Integrated semiconductor device and method of manufacturing thereof
03/06/2007US7186622 Formation of active area using semiconductor growth process without STI integration
03/06/2007US7186621 Method of forming a negative differential resistance device
03/06/2007US7186620 Method of making substrates for nitride semiconductor devices
03/06/2007US7186619 Insulated-gate field-effect transistor integrated with negative differential resistance (NDR) FET
03/06/2007US7186618 Power transistor arrangement and method for fabricating it
03/06/2007US7186617 Methods of forming integrated circuit devices having a resistor pattern and plug pattern that are made from a same material
03/06/2007US7186616 Method of removing nanoclusters in a semiconductor device
03/06/2007US7186615 Method of forming a floating gate for a split-gate flash memory device
03/06/2007US7186614 Method for manufacturing high density flash memory and high performance logic on a single die
03/06/2007US7186613 Low dielectric materials and methods for making same
03/06/2007US7186612 Non-volatile DRAM and a method of making thereof
03/06/2007US7186611 High-density germanium-on-insulator photodiode array
03/06/2007US7186610 ESD protection device for high performance IC
03/06/2007US7186609 Method of fabricating trench junction barrier rectifier
03/06/2007US7186608 Masked nitrogen enhanced gate oxide
03/06/2007US7186607 Charge-trapping memory device and method for production
03/06/2007US7186606 Method of forming an integrated circuit employable with a power converter
03/06/2007US7186605 Method of fabricating gates
03/06/2007US7186604 Semiconductor integrated circuit device and method for fabricating the same
03/06/2007US7186603 Method of forming notched gate structure
03/06/2007US7186602 Laser annealing method
03/06/2007US7186601 Method of fabricating a semiconductor device utilizing a catalyst material solution
03/06/2007US7186600 Semiconductor device and method of manufacturing the same
03/06/2007US7186599 Narrow-body damascene tri-gate FinFET
03/06/2007US7186598 Semiconductor device and manufacturing method of the same
03/06/2007US7186597 Method of manufacturing transistors
03/06/2007US7186595 Solid picture element manufacturing method
03/06/2007US7186594 High voltage ESD-protection structure
03/06/2007US7186593 Methods of fabricating integrated circuit devices having fuse structures including buffer layers
03/06/2007US7186592 High performance, integrated, MOS-type semiconductor device and related manufacturing process
03/06/2007US7186591 Method of encapsulating an assembly with a low temperature silicone rubber compound
03/06/2007US7186590 Thermally enhanced lid for multichip modules
03/06/2007US7186589 Method for fabricating semiconductor components using mold cavities having runners configured to minimize venting
03/06/2007US7186588 Method of fabricating a micro-array integrated circuit package
03/06/2007US7186587 Singulation method used in image sensor packaging process and support for use therein
03/06/2007US7186586 Integrated circuits and packaging substrates with cavities, and attachment methods including insertion of protruding contact pads into cavities
03/06/2007US7186585 Method of manufacturing an integrated heat spreader lid
03/06/2007US7186584 Integrated circuit chip, electronic device and method of manufacturing the same, and electronic instrument
03/06/2007US7186583 Methods of fabricating image sensors including local interconnections
03/06/2007US7186582 Providing a chemical vapor deposition chamber having disposed therein a substrate:introducing a gas comprised of a higher-order silane of the formula SinH2n+2 and a germanium precursor to the chamber, wherein n=3 6; and depositing a SiGe-containing film onto the substrate
03/06/2007US7186581 Organic electroluminescent device, manufacturing method therefor, and electronic devices therewith
03/06/2007US7186580 Light emitting diodes (LEDs) with improved light extraction by roughening
03/06/2007US7186579 Method for producing a group III nitride compound semiconductor laser
03/06/2007US7186578 Thin sheet production method and thin sheet production device
03/06/2007US7186577 Method for monitoring a density profile of impurities
03/06/2007US7186576 Stacked die module and techniques for forming a stacked die module
03/06/2007US7186575 Manufacturing method of semiconductor device
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