Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
03/2007
03/01/2007US20070048996 Method for fabricating low resistance, low inductance interconnections in high current semiconductor devices
03/01/2007US20070048995 Method for production of semiconductor devices
03/01/2007US20070048994 Methods for forming through-wafer interconnects and structures resulting therefrom
03/01/2007US20070048993 Semiconductor product and method for forming a semiconductor product
03/01/2007US20070048992 Integrated PVD system using designated PVD chambers
03/01/2007US20070048991 Copper interconnect structures and fabrication method thereof
03/01/2007US20070048990 Method of buffer layer formation for RRAM thin film deposition
03/01/2007US20070048989 Atomic layer deposition of GdScO3 films as gate dielectrics
03/01/2007US20070048988 Method for manufacturing semiconductor device using polymer
03/01/2007US20070048987 Manufacturing method of semiconductor device
03/01/2007US20070048986 Salicide process
03/01/2007US20070048985 Dual silicide semiconductor fabrication process
03/01/2007US20070048984 Metal work function adjustment by ion implantation
03/01/2007US20070048983 Method of fabricating silicon thin film layer
03/01/2007US20070048982 Method of manufacturing semiconductor device and semiconductor device formed by the method
03/01/2007US20070048981 Method for protecting a semiconductor device from carbon depletion based damage
03/01/2007US20070048980 Method for post-rie passivation of semiconductor surfaces for epitaxial growth
03/01/2007US20070048978 Mask for sequential lateral solidification (SLS) process and a method thereof
03/01/2007US20070048977 Method of depositing Ge-Sb-Te thin film
03/01/2007US20070048976 Methods of forming semiconductor constructions and capacitors
03/01/2007US20070048975 Method and apparatus for making coplanar dielectrically-isolated regions of different semiconductor materials on a substrate
03/01/2007US20070048974 EPI wafer and method of making the same
03/01/2007US20070048973 Semiconductor device and method of manufacturing the same
03/01/2007US20070048972 Method and apparatus for breaking semiconductor wafers
03/01/2007US20070048971 Laminated Substrate Manufacturing Method and Laminated Substrate Manufactured by the Method
03/01/2007US20070048970 Semiconductor device and manufacturing method thereof
03/01/2007US20070048969 Stacked chip package using photosensitive polymer and manufacturing method thereof
03/01/2007US20070048968 Semiconductor on glass insulator with deposited barrier layer
03/01/2007US20070048967 Low-leakage transistor and manufacturing method thereof
03/01/2007US20070048966 Narrow semiconductor trench structure
03/01/2007US20070048965 Reduced refractive index and extinction coefficient layer for enhanced photosensitivity
03/01/2007US20070048964 Three dimensional scaffold and method of fabricating the same
03/01/2007US20070048963 Method of manufacturing semiconductor device
03/01/2007US20070048962 TaN integrated circuit (IC) capacitor formation
03/01/2007US20070048961 Semiconductor device and fabricating method thereof
03/01/2007US20070048960 Resistor integration structure and technique for noise elimination
03/01/2007US20070048959 Registration mark within an overlap of dopant regions
03/01/2007US20070048958 Three-dimensional multi-gate device and fabricating method thereof
03/01/2007US20070048957 Method of manufacturing a charge-trapping dielectric and method of manufacturing a sonos-type non-volatile semiconductor device
03/01/2007US20070048956 Interrupted deposition process for selective deposition of Si-containing films
03/01/2007US20070048955 Method for enhancing electrode surface area in DRAM cell capacitors
03/01/2007US20070048954 Method for etching and apparatus for etching
03/01/2007US20070048953 Graded dielectric layers
03/01/2007US20070048952 Method to manufacture ldmos transistors with improved threshold voltage control
03/01/2007US20070048951 Method for production of semiconductor memory devices
03/01/2007US20070048950 Magnetic devices and techniques for formation thereof
03/01/2007US20070048949 Process of manufacturing semiconductor device
03/01/2007US20070048948 Apparatus and method for non-contact assessment of a constituent in semiconductor substrates
03/01/2007US20070048947 Multi-structured Si-fin and method of manufacture
03/01/2007US20070048946 Transistor gate forming methods and integrated circuits
03/01/2007US20070048945 Memory device and method of making same
03/01/2007US20070048944 Low voltage trigger and save area electrostatic discharge device
03/01/2007US20070048943 Vertical wrap-around-gate field-effect-transistor for high density, low voltage logic and memory array
03/01/2007US20070048942 Methods of forming field effect transistors on substrates
03/01/2007US20070048941 Transistor gate forming methods and transistor structures
03/01/2007US20070048940 Dense non-volatile memory array and method of fabrication
03/01/2007US20070048939 Single-poly eprom device and method of manufacturing
03/01/2007US20070048938 Method of manufacturing MOS transistor with multiple channel structure
03/01/2007US20070048937 Method of fabricating non-volatile memory
03/01/2007US20070048936 Method for forming memory cell and periphery circuits
03/01/2007US20070048935 Flash memory with recessed floating gate
03/01/2007US20070048934 Method of fabricating a semiconductor device having a single gate electrode corresponding to a pair of fin-type channel regions
03/01/2007US20070048933 Semiconductor device manufacturing method
03/01/2007US20070048932 Semiconductor constructions comprising conductive structures, and methods of forming conductive structures
03/01/2007US20070048931 Semiconductor device and its manufacture method
03/01/2007US20070048930 Peripheral gate stacks and recessed array gates
03/01/2007US20070048929 Semiconductor device with dielectric structure and method for fabricating the same
03/01/2007US20070048928 Method in the fabrication of a monolithically integrated vertical device on an SOI substrate
03/01/2007US20070048927 Shallow trench isolation by atomic-level silicon reconstruction
03/01/2007US20070048926 Lanthanum aluminum oxynitride dielectric films
03/01/2007US20070048925 Body-Contacted Silicon on Insulation (SOI) field effect transistors
03/01/2007US20070048924 Method of fabricating nonvolatile memory device
03/01/2007US20070048923 Flash memory with low tunnel barrier interpoly insulators
03/01/2007US20070048922 Nand flash memory devices and methods of fabricating the same
03/01/2007US20070048921 Method for manufacturing semiconductor device
03/01/2007US20070048920 Methods for dual metal gate CMOS integration
03/01/2007US20070048919 Modified hybrid orientation technology
03/01/2007US20070048918 Method for fabricating electronic device
03/01/2007US20070048917 Process for Producing Semiconductor Integrated Circuit Device
03/01/2007US20070048916 Method for fabricating semiconductor device
03/01/2007US20070048915 Method for forming a thin film transistor
03/01/2007US20070048914 Method of fabricating dual gate electrode of cmos semiconductor device
03/01/2007US20070048913 Method of manufacturing a stacked semiconductor device
03/01/2007US20070048912 Method of forming single crystalline silicon layer, structure including the same, and method of fabricating thin film transistor using the same
03/01/2007US20070048911 Etching tape and method of fabricating array substrate for liquid crystal display using the same
03/01/2007US20070048910 Method For Manufacturing Thin Film Transistor Array Panel For Display Device
03/01/2007US20070048909 Superjunction device with improved ruggedness
03/01/2007US20070048908 Method and apparatus for fabricating a carbon nanotube transistor
03/01/2007US20070048907 Methods of forming NMOS/PMOS transistors with source/drains including strained materials and devices so formed
03/01/2007US20070048906 Method for fabricating semiconductor device
03/01/2007US20070048905 Method for encapsulating a component, especially an electric or electronic component, by means of an improved solder seam
03/01/2007US20070048904 Radiant energy heating for die attach
03/01/2007US20070048903 Multi-chip package type semiconductor device
03/01/2007US20070048902 Microfeature workpieces, carriers, and associated methods
03/01/2007US20070048901 Wafer-level package and IC module assembly method for the wafer-level package
03/01/2007US20070048900 Underfill compounds including electrically charged filler elements, microelectronic devices having underfill compounds including electrically charged filler elements, and methods of underfilling microelectronic devices
03/01/2007US20070048899 Wafer level package and method for making the same
03/01/2007US20070048898 Wafer level hermetic bond using metal alloy with raised feature
03/01/2007US20070048897 Method and apparatus for depositing conductive paste in circuitized substrate openings
03/01/2007US20070048896 Conductive through via structure and process for electronic device carriers
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