Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
03/2007
03/08/2007WO2007026494A1 Semiconductor device and method for manufacturing same
03/08/2007WO2007026475A1 Photosensitive resin composition and photosensitive element
03/08/2007WO2007026458A1 Wafer-level burn-in method and wafer-level burn-in apparatus
03/08/2007WO2007026429A1 Semiconductor device and fabrication method thereof
03/08/2007WO2007026410A1 Method of manufacturing sheet for transferring solder bumps and sheet for transferring solder bumps
03/08/2007WO2007026391A1 Semiconductor device and fabrication method thereof
03/08/2007WO2007026390A1 Scanning exposure apparatus
03/08/2007WO2007025962A1 Method for making amorphous and polycrystalline silicon thin-film circuits
03/08/2007WO2007025961A1 Method for preparation of a planar sample body and preparation
03/08/2007WO2007025956A1 Single-poly eprom device and method of manufacturing
03/08/2007WO2007025930A1 Semi-conductor substrate and method and masking layer for producing a free-standing semi-conductor substrate by means of hydride-gas phase epitaxy
03/08/2007WO2007025859A2 Semiconductor structure with a laterally functional construction
03/08/2007WO2007025812A1 Method for producing through-contacts in semi-conductor wafers
03/08/2007WO2007025675A1 Aqueous solution and method for removing ionic contaminants from the surface of a workpiece
03/08/2007WO2007025566A1 Capping layer formation onto a dual damescene interconnect
03/08/2007WO2007025565A1 Semiconductor device including a coupled dielectric layer and metal layer, method of fabrication thereof, and material for coupling a dielectric layer and a metal layer in a semiconductor device
03/08/2007WO2007025564A1 Improved gate electrode silicidation process
03/08/2007WO2007025536A1 Method for producing silicon-containing surfaces and optoelectronic components
03/08/2007WO2007025412A1 A package including a microprocessor and fourth level cache
03/08/2007WO2007025392A1 Semiconductor structure with n-type region codoped with group i or ii elements
03/08/2007WO2007010135A3 Method for making a heterojunction bipolar transistor
03/08/2007WO2006135236A3 Method and device for cutting electronic components with a laser beam
03/08/2007WO2006132989A3 Cleaning method and solution for cleaning a wafer in a single wafer process
03/08/2007WO2006132789A3 Methods of etching nickel silicide and cobalt silicide and methods of forming conductive lines
03/08/2007WO2006131177A3 Method for producing seed layers for depositing semiconductor material
03/08/2007WO2006130811A3 Electronic device manufacturing chamber and methods of forming the same
03/08/2007WO2006124472A3 Method and apparatus for vertical transfer of semiconductor substrates in a cleaning module
03/08/2007WO2006120309A3 Silicon chips provided with inclined contact pads and an electronic module comprising said silicon chip
03/08/2007WO2006117765A3 Method for analyzing an integrated circuit, apparatus and integrated circuit
03/08/2007WO2006115857A3 Substrate processing platform allowing processing in different ambients
03/08/2007WO2006112711A3 Method and device for displacing electronic components ordered in a rectangualr structure
03/08/2007WO2006104634A3 Integrated circuit fabrication
03/08/2007WO2006081398A3 Mold cavity identification markings for ic packages
03/08/2007WO2006060339B1 Selective epitaxy process with alternating gas supply
03/08/2007WO2006060116A3 Multi-bit nanocrystal memory
03/08/2007WO2006026699A3 Method for integrated circuit fabrication using pitch multiplication
03/08/2007WO2006011675A8 Nitride compound semiconductor and process for producing the same
03/08/2007WO2006009850A3 Semiconductor assembly having substrate with electroplated contact pads
03/08/2007WO2005122691A3 Crystal growth method and apparatus
03/08/2007WO2005122250B1 High power mcm package with improved planarity and heat dissipation
03/08/2007WO2005091784A3 Lens array and method for making same
03/08/2007WO2005079366B1 Complimentary nitride transistors vertical and common drain
03/08/2007WO2005079198A3 Wafer bonded virtual substrate and method for forming the same
03/08/2007WO2005077012A3 Cmut devices and fabrication methods
03/08/2007WO2005036604A3 Apparatus and method for supporting a flexible substrate during processing
03/08/2007WO2005031800A3 Processing chamber including a circulation loop integrally formed in a chamber housing
03/08/2007WO2002029137A9 Method and associated apparatus for tilting a substrate upon entry for metal deposition
03/08/2007US20070055907 Self-reparable semiconductor and method thereof
03/08/2007US20070055906 Self-reparable semiconductor and method thereof
03/08/2007US20070055845 Self-reparable semiconductor and method thereof
03/08/2007US20070055467 Workpiece inspection apparatus assisting device, workpiece inspection method and computer-readable recording media storing program therefor
03/08/2007US20070055453 Methods for electronic fluorescent perturbation for analysis and electronic perturbation catalysis for synthesis
03/08/2007US20070054823 Removal of post etch residues and copper contamination from low-K dielectrics using supercritical CO2 with diketone additives
03/08/2007US20070054607 Lapping plate resurfacing abrasive member and method
03/08/2007US20070054606 Method of adhering polishing pads and jig for adhering the same
03/08/2007US20070054507 Method of fabricating oxide semiconductor device
03/08/2007US20070054506 Grooved substrates for uniform underfilling solder ball assembled electronic devices
03/08/2007US20070054505 PECVD processes for silicon dioxide films
03/08/2007US20070054504 Post deposition plasma treatment to increase tensile stress of HDP-CVD SIO2
03/08/2007US20070054503 Film forming method and fabrication process of semiconductor device
03/08/2007US20070054502 Nanodot memory and fabrication method thereof
03/08/2007US20070054501 Process for modifying dielectric materials
03/08/2007US20070054500 Removable amorphous carbon cmp stop
03/08/2007US20070054499 Apparatus and method for forming polycrystalline silicon thin film
03/08/2007US20070054498 Method for applying resin film to face of semiconductor wafer
03/08/2007US20070054497 Method for preventing contamination and lithographic device
03/08/2007US20070054496 Gas mixture for removing photoresist and post etch residue from low-k dielectric material and method of use thereof
03/08/2007US20070054495 CMP composition of boron surface-modified abrasive and nitro-substituted sulfonic acid and method of use
03/08/2007US20070054494 Method for planarizing semiconductor structures
03/08/2007US20070054493 Methods of forming patterns using phase change material and methods for removing the same
03/08/2007US20070054492 Photoreactive removal of ion implanted resist
03/08/2007US20070054491 Wafer cleaning process
03/08/2007US20070054490 Semiconductor process for preventing layer peeling in wafer edge area and method for manufacturing interconnects
03/08/2007US20070054489 Interconnect structures with encasing cap and methods of making thereof
03/08/2007US20070054488 Low resistance and reliable copper interconnects by variable doping
03/08/2007US20070054487 Atomic layer deposition processes for ruthenium materials
03/08/2007US20070054486 Method for forming opening
03/08/2007US20070054485 Integration control and reliability enhancement of interconnect air cavities
03/08/2007US20070054484 Method for fabricating semiconductor packages
03/08/2007US20070054483 Integrated Die Bumping Process
03/08/2007US20070054482 Semiconductor device fabrication method
03/08/2007US20070054481 Semiconductor device having nickel silicide and method of fabricating nickel silicide
03/08/2007US20070054480 Anti-halo compensation
03/08/2007US20070054479 Laser irradiation device
03/08/2007US20070054478 Method of forming polysilicon film using a laser annealing apparatus
03/08/2007US20070054477 Method of forming polycrystalline silicon thin film and method of manufacturing thin film transistor using the method
03/08/2007US20070054476 Method of producing a nitride semiconductor device and nitride semiconductor device
03/08/2007US20070054475 Method of forming a phase changeable material layer, a method of manufacturing a phase changeable memory unit, and a method of manufacturing a phase changeable semiconductor memory device
03/08/2007US20070054474 Crack-free III-V epitaxy on germanium on insulator (GOI) substrates
03/08/2007US20070054473 Method of semiconductor thin film crystallization and semiconductor device fabrication
03/08/2007US20070054472 Apparatus for preparing oxide thin film and method for preparing the same
03/08/2007US20070054471 Alignment mark and method of forming the same
03/08/2007US20070054470 Method for thinning substrate and method for manufacturing circuit device
03/08/2007US20070054469 Pressure-sensitive adhesive sheet and method of processing articles
03/08/2007US20070054468 Method for producing silicon epitaxial wafer
03/08/2007US20070054467 Methods for integrating lattice-mismatched semiconductor structure on insulators
03/08/2007US20070054466 Semiconductor-on-insulator type heterostructure and method of fabrication
03/08/2007US20070054465 Lattice-mismatched semiconductor structures on insulators
03/08/2007US20070054464 Different STI depth for Ron improvement for LDMOS integration with submicron devices
03/08/2007US20070054463 Method for forming spacers between bitlines in virtual ground memory array and related structure
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