Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
10/2008
10/23/2008WO2007120640A3 Thermally induced single-use valves and method of use
10/23/2008WO2007120291A3 Semiconductor device comprising a transistor having a counter-doped channel region and method for forming the same
10/23/2008WO2007120283A3 Transistor with immersed contacts and methods of forming thereof
10/23/2008WO2007112149A3 Semiconductor structures formed by stepperless manufacturing
10/23/2008WO2007106646A3 Electronic device and a process for forming the electronic device
10/23/2008WO2007106502A8 Thin silicon or germanium sheets and photovoltaics formed from thin sheets
10/23/2008WO2007100528A3 Integrated capacitive and inductive power sources for a plasma etching chamber
10/23/2008WO2007040718A3 Multi-source method and system for forming an oxide layer
10/23/2008WO2006009781A3 Dynamic p-n junction growth
10/23/2008US20080263483 Optical proximity correction method, optical proximity correction apparatus, and optical proximity correction program, method of manufacturing semiconductor device, design rule formulating method, and optical proximity correction condition calculating method
10/23/2008US20080263028 Report Search Method, Report Search System, and Reviewing Apparatus
10/23/2008US20080262655 Method of Controlling Operation of a Processing System
10/23/2008US20080261497 Retainer Ring For Cmp Device
10/23/2008US20080261413 Pretreatment processes within a batch ald reactor
10/23/2008US20080261412 Apparatus and method for atomic layer deposition
10/23/2008US20080261411 Method for manufacturing SOI substrate
10/23/2008US20080261410 Thermally growing an interfacial oxide layer of silicon dioxide over silicon substrate; treating surface with an aqueous ammonium hydroxide (NH4OH) containing solution; and, depositing a high-K (dielectric) material such as hafnium oxide over interfacial oxide layer; atomic layer or vapor deposition
10/23/2008US20080261409 Processing device and method for processing a substrate
10/23/2008US20080261408 Methods for fabricating a stress enhanced semiconductor device having narrow pitch and wide pitch transistors
10/23/2008US20080261407 Semiconductor device with hydrogen barrier and method therefor
10/23/2008US20080261406 Etching method and semiconductor device fabrication method
10/23/2008US20080261405 Hydrogen ashing enhanced with water vapor and diluent gas
10/23/2008US20080261404 Method of making semiconductor device
10/23/2008US20080261403 Method for obtaining high-quality boundary for semiconductor devices fabricated on a partitioned substrate
10/23/2008US20080261402 Method of removing insulating layer on substrate
10/23/2008US20080261401 Chemical-Mechanical Polishing of Sic Surfaces Using Hydrogen Peroxide or Ozonated Water Solutions in Combination with Colloidal Abrasive
10/23/2008US20080261400 Polishing composition, polishing method, and method for forming copper wiring for semiconductor integrated circuit
10/23/2008US20080261399 Method for chemical mechanical polishing in a scan manner of a semiconductor device
10/23/2008US20080261398 Semiconductor device having oxidized metal film and manufacture method of the same
10/23/2008US20080261397 Method for Manufacturing Semiconductor Device
10/23/2008US20080261396 Substrate having high electrical connection reliability of a penetrating via connected to wirings and a method for manufacturing the same
10/23/2008US20080261395 Semiconductor Device, Method for Manufacturing Semiconductor Devices and Mask Systems Used in the Manufacturing of Semiconductor Devices
10/23/2008US20080261394 Method for fabricating semiconductor device with silicided gate
10/23/2008US20080261393 Reducing wire erosion during damascene processing
10/23/2008US20080261392 Conductive via formation
10/23/2008US20080261391 Method of producing semiconductor device
10/23/2008US20080261390 Method for forming bumps on under bump metallurgy
10/23/2008US20080261389 Method of forming micro pattern of semiconductor device
10/23/2008US20080261388 Semiconductor assemblies, methods of forming structures over semiconductor substrates, and methods of forming transistors associated with semiconductor substrates
10/23/2008US20080261387 Semiconductor device and method of manufacturing semiconductor device
10/23/2008US20080261386 Sample wafer fabrication method
10/23/2008US20080261385 Method for selective removal of a layer
10/23/2008US20080261384 Removing photoresist layer with hydrogen, oxygen, and nitrogen to transform surface to a crust covering a soft photoresist layer; doping; wet, dry, or plasma stripping in pinning-down manner; temperature for first removing step is lower than second removing step and gasification temperature of solvent
10/23/2008US20080261383 Semiconductor workpiece carriers and methods for processing semiconductor workpieces
10/23/2008US20080261382 Wafer dicing using a fiber mopa
10/23/2008US20080261381 Method for manufacturing bonded substrate
10/23/2008US20080261380 Semiconductor Layer Structure And Method Of Making The Same
10/23/2008US20080261379 Method for manufacturing SOI substrate and semiconductor device
10/23/2008US20080261378 Method for Growth of Gan Single Crystal, Method for Preparation of Gan Substrate, Process for Producing Gan-Based Element, and Gan-Based Element
10/23/2008US20080261377 Method of forming a device wafer with recyclable support
10/23/2008US20080261376 Method of manufacturing SOI substrate
10/23/2008US20080261375 Method of Forming a Semiconductor Device Having a Dummy Feature
10/23/2008US20080261374 Separate layer formation in a semiconductor device
10/23/2008US20080261373 Method of fabricating semconductor device
10/23/2008US20080261371 VERTICAL BIPOLAR TRANSISTOR WITH A MAJORITY CARRIER ACCUMULATION LAYER AS A SUBCOLLECTOR FOR SOI BiCMOS WITH REDUCED BURIED OXIDE THICKNESS FOR LOW-SUBSTRATE BIAS OPERATION
10/23/2008US20080261370 Semiconductor device and method of fabricating the same
10/23/2008US20080261369 Structure and method for mosfet with reduced extension resistance
10/23/2008US20080261368 Work function adjustment with the implant of lanthanides
10/23/2008US20080261367 Method for process integration of non-volatile memory cell transistors with transistors of another type
10/23/2008US20080261366 Non-volatile memory device having improved erase efficiency and method of manufacturing the same
10/23/2008US20080261365 Nonvolatile semiconductor memory device and manufacturing method thereof
10/23/2008US20080261363 Dual gated finfet gain cell
10/23/2008US20080261362 Method of making a semiconductor device using a stressor
10/23/2008US20080261361 Shallow trench isolation for SOI structures combining sidewall spacer and bottom liner
10/23/2008US20080261360 Methods of manufacturing a semiconductor device
10/23/2008US20080261359 LDMOS Transistor Device, Integrated Circuit, and Fabrication Method Thereof
10/23/2008US20080261358 Manufacture of Lateral Semiconductor Devices
10/23/2008US20080261357 Method for fabrication of semiconductor device
10/23/2008US20080261356 Method of forming thin film transistor
10/23/2008US20080261355 Method of making a semiconductor device with a stressor
10/23/2008US20080261354 Structure and method of fabricating a hybrid substrate for high-performance hybrid-orientation silicon-on-insulator cmos devices
10/23/2008US20080261353 Underfill film having thermally conductive sheet
10/23/2008US20080261352 Semiconductor device, method of manufacturing thereof, circuit board and electronic apparatus
10/23/2008US20080261351 Wafer sawing method
10/23/2008US20080261350 Solder interconnection array with optimal mechanical integrity
10/23/2008US20080261349 Protective coating for planarization
10/23/2008US20080261348 Method of manufacturing semiconductor film and method of manufacturing photovoltaic element
10/23/2008US20080261347 Method of manufacturing semiconductor film and method of manufacturing photovoltaic element
10/23/2008US20080261345 Method for manufacturing a semiconductor pressure sensor
10/23/2008US20080261344 Vacuum packaged single crystal silicon device
10/23/2008US20080261343 Vacuum packaged single crystal silicon device
10/23/2008US20080261342 Chemical Sensor Using Semiconducting Metal Oxide Nanowires
10/23/2008US20080261340 Surface-roughening method
10/23/2008US20080261339 Packaging method to manufacture package for a high-power light emitting diode
10/23/2008US20080261338 Method For Manufacturing an Electronics Module Comprising a Component Electrically Connected to a Conductor-Pattern Layer
10/23/2008US20080261337 Low voltage electron source with self aligned gate apertures, fabrication method thereof, and luminous display using the electron source
10/23/2008US20080261336 Semiconductor device and manufacturing method thereof
10/23/2008US20080261335 Endpoint detection for photomask etching
10/23/2008US20080261334 Method of Processing Semiconductor Wafers
10/23/2008US20080261333 Methods of forming a material film, methods of forming a capacitor, and methods of forming a semiconductor memory device using the same
10/23/2008US20080261332 Method for manufacturing semiconductor device
10/23/2008US20080261331 Mram and method of manufacturing the same
10/23/2008US20080261157 Semiconductor laser device and method of manufacturing the same
10/23/2008US20080261156 Buffer pattern formed on object layer in cell region, a hard mask layer remains on the object layer in the peripheral region; buffer layer is removed forming a cell hard mask pattern; minute pattern formed; minimization of variations or edge line roughness due to photolithography
10/23/2008US20080261155 Metallic Air-Bridges
10/23/2008US20080261149 3-hydroxy-1-methacryloyloxy-adamantane-2-acryloyloxypropyl phthalate copolymer; exposing layer of a photosensitive etching resistance material on a substrate made of semiconductor or quartz glass, heating, development, fluoric acid etching
10/23/2008US20080261128 Mask for semiconductor (integrated circuits) manufacture composed of a layer with a grain interface or a a material interface that provides enhanced etch selectivity, especially a tunable, etch resistant anti-reflective coating material and increased resistance to semiconductor manufacturing processes
10/23/2008US20080261125 Resist pattern and reflow technology
10/23/2008US20080261124 forming a photoresist pattern using a light shield layer over a semiconductor substrate; prevent the thinning of the isolated pattern; restrain the straying-in of light due to diffraction, the thinning of the resist pattern can be restrained more effectively
10/23/2008US20080261054 Heating, applying voltage to conductive or semi-conductive cover material on a glass or glass ceramic forming an oxide layer between the cover material and the substrate; removing all of the cover material
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