Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
10/2008
10/21/2008US7439197 Method of fabricating a capacitor
10/21/2008US7439196 Method for manufacturing pattern formed structure
10/21/2008US7439195 Systems and methods for forming metal oxides using metal compounds containing aminosilane ligands
10/21/2008US7439194 Lanthanide doped TiOx dielectric films by plasma oxidation
10/21/2008US7439193 Patterning method for fabricating high resolution structures
10/21/2008US7439192 Method of forming a layer on a semiconductor substrate
10/21/2008US7439191 Deposition of silicon layers for active matrix liquid crystal display (AMLCD) applications
10/21/2008US7439190 Fabrication method of semiconductor device
10/21/2008US7439189 Surface treatment after selective etching
10/21/2008US7439188 Reactor with heated and textured electrodes and surfaces
10/21/2008US7439187 Grayscale reticle for precise control of photoresist exposure
10/21/2008US7439186 Method for structuring a silicon layer
10/21/2008US7439185 Method for fabricating semiconductor device and semiconductor device
10/21/2008US7439184 Method of making comb-teeth electrode pair
10/21/2008US7439183 Method of manufacturing a semiconductor device, and a semiconductor substrate
10/21/2008US7439182 Semiconductor device and method of fabricating the same
10/21/2008US7439181 Method for processing interior of vapor phase deposition apparatus, method for depositing thin film and method for manufacturing semiconductor device
10/21/2008US7439180 Dispenser system for atomic beam assisted metal organic chemical vapor deposition (MOCVD)
10/21/2008US7439179 Healing detrimental bonds in deposited materials
10/21/2008US7439178 Technique for stable processing of thin/fragile substrates
10/21/2008US7439177 Method of manufacturing semiconductor device for improving contact hole filling characteristics while reducing parasitic capacitance of inter-metal dielectric
10/21/2008US7439176 Semiconductor device multilayer structure, fabrication method for the same, semiconductor device having the same, and semiconductor device fabrication method
10/21/2008US7439175 Method for fabricating a thin film and metal line of semiconductor device
10/21/2008US7439174 Multilayer hardmask scheme for damage-free dual damascene processing of SiCOH dielectrics
10/21/2008US7439173 Increasing electromigration lifetime and current density in IC using vertically upwardly extending dummy via
10/21/2008US7439172 Circuit structure with low dielectric constant regions and method of forming same
10/21/2008US7439171 Method for manufacturing electronic device
10/21/2008US7439170 Design structure for final via designs for chip stress reduction
10/21/2008US7439169 Integrated circuit and methods of redistributing bondpad locations
10/21/2008US7439168 Apparatus and method of forming silicide in a localized manner
10/21/2008US7439167 Nonvolatile semiconductor memory and manufacturing method thereof
10/21/2008US7439166 Method for producing tiered gate structure devices
10/21/2008US7439165 Method of fabricating tensile strained layers and compressive strain layers for a CMOS device
10/21/2008US7439164 Methods of fabricating semiconductor structures having epitaxially grown source and drain elements
10/21/2008US7439163 Methods for fabricating fluid injection devices
10/21/2008US7439162 Method of dividing wafer into individual devices after forming a recessed portion of the wafer and making thickness of wafer uniform
10/21/2008US7439161 Semiconductor device and method for manufacturing the same
10/21/2008US7439160 Methods for producing a semiconductor entity
10/21/2008US7439159 Fusion bonding process and structure for fabricating silicon-on-insulator (SOI) semiconductor devices
10/21/2008US7439158 Strained semiconductor by full wafer bonding
10/21/2008US7439157 Isolation trenches for memory devices
10/21/2008US7439156 Method for manufacturing semiconductor device
10/21/2008US7439155 Isolation techniques for reducing dark current in CMOS image sensors
10/21/2008US7439154 Method of fabricating interconnect structure
10/21/2008US7439153 Semiconductor device and manufacturing method thereof for reducing the area of the memory cell region
10/21/2008US7439152 Methods of forming a plurality of capacitors
10/21/2008US7439151 Method and structure for integrating MIM capacitors within dual damascene processing techniques
10/21/2008US7439150 Method of manufacturing a semiconductor device
10/21/2008US7439149 Structure and method for forming SOI trench memory with single-sided strap
10/21/2008US7439146 Field plated resistor with enhanced routing area thereover
10/21/2008US7439145 Tunable semiconductor diodes
10/21/2008US7439144 CMOS gate structures fabricated by selective oxidation
10/21/2008US7439143 Flash memory device and method of manufacturing the same
10/21/2008US7439142 Methods to fabricate MOSFET devices using a selective deposition process
10/21/2008US7439141 Shallow trench isolation approach for improved STI corner rounding
10/21/2008US7439140 Formation of standard voltage threshold and low voltage threshold MOSFET devices
10/21/2008US7439139 Fully-depleted castellated gate MOSFET device and method of manufacture thereof
10/21/2008US7439138 Method of forming integrated circuitry
10/21/2008US7439137 Method for manufacturing semiconductor device
10/21/2008US7439136 Method of forming a layer comprising epitaxial silicon
10/21/2008US7439135 Self-aligned body contact for a semiconductor-on-insulator trench device and method of fabricating same
10/21/2008US7439134 Method for process integration of non-volatile memory cell transistors with transistors of another type
10/21/2008US7439133 Memory structure and method of manufacturing a memory array
10/21/2008US7439132 Semiconductor device comprising capacitor and method of fabricating the same
10/21/2008US7439131 Flash memory device having resistivity measurement pattern and method of forming the same
10/21/2008US7439130 Semiconductor device with capacitor and method for fabricating the same
10/21/2008US7439129 Methods for fabricating ferroelectric memory devices
10/21/2008US7439128 Method of creating deep trench capacitor using a P+ metal electrode
10/21/2008US7439127 Method for fabricating a semiconductor component including a high capacitance per unit area capacitor
10/21/2008US7439126 Method for manufacturing semiconductor memory
10/21/2008US7439125 Contact structure for a stack DRAM storage capacitor
10/21/2008US7439124 Method of manufacturing a semiconductor device and semiconductor device
10/21/2008US7439123 Low resistance contact semiconductor device structure
10/21/2008US7439122 Method of manufacturing semiconductor device having improved RESURF Trench isolation and method of evaluating manufacturing method
10/21/2008US7439121 Dielectric film and method of forming it, semiconductor device, non-volatile semiconductor memory device, and production method for semiconductor device
10/21/2008US7439120 Method for fabricating stress enhanced MOS circuits
10/21/2008US7439119 Thermally stable BiCMOS fabrication method and bipolar junction transistors formed according to the method
10/21/2008US7439118 Method of manufacturing semiconductor integrated circuit
10/21/2008US7439117 Method for designing a micro electromechanical device with reduced self-actuation
10/21/2008US7439116 Apparatus and method for forming polycrystalline silicon thin film
10/21/2008US7439115 Semiconductor fabricating apparatus
10/21/2008US7439114 Laser anneal method of a semiconductor layer
10/21/2008US7439112 Semiconductor device using partial SOI substrate and manufacturing method thereof
10/21/2008US7439111 Semiconductor device and manufacturing method thereof
10/21/2008US7439110 Strained HOT (hybrid orientation technology) MOSFETs
10/21/2008US7439109 Method of forming an integrated circuit structure on a hybrid crystal oriented substrate
10/21/2008US7439108 Coplanar silicon-on-insulator (SOI) regions of different crystal orientations and methods of making the same
10/21/2008US7439107 Laser irradiation apparatus, method of irradiating laser light, and method of manufacturing a semiconductor device
10/21/2008US7439106 Gate CD trimming beyond photolithography
10/21/2008US7439105 Metal gate with zirconium
10/21/2008US7439104 Semiconductor device with increased channel length and method for fabricating the same
10/21/2008US7439103 Organic thin film transistor, method for fabricating the same, and liquid crystal display device with the same
10/21/2008US7439102 Semiconductor fuse box and method for fabricating the same
10/21/2008US7439101 Resin encapsulation molding method for semiconductor device
10/21/2008US7439100 Encapsulated chip scale package having flip-chip on lead frame structure and method
10/21/2008US7439099 Thin ball grid array package
10/21/2008US7439098 Semiconductor package for encapsulating multiple dies and method of manufacturing the same
10/21/2008US7439097 Taped lead frames and methods of making and using the same in semiconductor packaging
10/21/2008US7439096 Semiconductor device encapsulation
10/21/2008US7439095 CMOS image sensor and method for fabricating the same
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