Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
10/2008
10/16/2008WO2008123116A1 Soi substrate and method for manufacturing soi substrate
10/16/2008WO2008123111A1 Substrate heat treatment device and substrate heat treatment method
10/16/2008WO2008123110A1 Photosensitive adhesive composition, film-like adhesive, adhesive sheet, adhesive pattern, semiconductor wafer with adhesive layer, semiconductor device and semiconductor device manufacturing method
10/16/2008WO2008123088A1 Thin-film transistor, its manufacturing method, and display
10/16/2008WO2008123087A1 Anisotropic conductive paste
10/16/2008WO2008123085A1 Cushion for polishing pad and polishing pad using the cushion
10/16/2008WO2008123080A1 Semiconductor device
10/16/2008WO2008123075A1 Through-etching process and method for producing contactor
10/16/2008WO2008123060A1 Vacuum processing apparatus
10/16/2008WO2008123049A1 Method for film formation, resin composition for use in the method, structure having insulating film, process for producing the structure, and electronic component
10/16/2008WO2008123023A1 Spin relaxation/change method, spin current detection method, and spintronics device utilizing spin relaxation
10/16/2008WO2008123012A1 Method of manufacturing semiconductor chip
10/16/2008WO2008122957A1 Deposition of ta- or nb-doped high-k films
10/16/2008WO2008122204A1 Chemical mechanical polishing liquid for polycrystalline silicon
10/16/2008WO2008106413A3 Formation of fully silicided gate with oxide barrier on the source/drain silicide regions
10/16/2008WO2008100705A3 Integrated hydrogen anneal and gate oxidation for improved gate oxide integrity
10/16/2008WO2008094754A3 Automation adjustment utilizing low melting point alloys
10/16/2008WO2008088599A3 Forced ion migration for chalcogenide phase change memory device
10/16/2008WO2008085390A3 Substrate cleaning processes through the use of solvents and systems
10/16/2008WO2008083143A3 Semiconductor device assembly with chip-on-lead (col) and cantilever leads
10/16/2008WO2008076812A3 Methods for recess etching
10/16/2008WO2008046058A3 Nanowire-based transparent conductors and applications thereof
10/16/2008WO2008042695A3 Semiconductor devices containing nitrided high dielectric constant films and method of forming
10/16/2008WO2008033227A3 Optically clear nanoparticle colloidal suspensions and method of making thereof
10/16/2008WO2008027186A3 Integrated process for sputter deposition of a conductive barrier layer, especially an alloy of ruthenium and tantalum, underlying copper or copper alloy seed layer
10/16/2008WO2008024225A3 Reduced capacity carrier, transport, load port, buffer system
10/16/2008WO2008020974A3 Method and apparatus for single-sided etching
10/16/2008WO2008020965A3 Euv optics
10/16/2008WO2008019362A3 Controlling critical dimensions in track lithography tools
10/16/2008WO2008014128A3 User interface system
10/16/2008WO2008013931A3 Bottom source ldmosfet structure and method
10/16/2008WO2008013659A3 Single precursors for atomic layer deposition
10/16/2008WO2008008216A3 Liquid aerosol particle removal method
10/16/2008WO2008004179A3 Non-volatile memory and-array and method for operating the game
10/16/2008WO2007140377A9 A novel deposition-plasma cure cycle process to enhance film quality of silicon dioxide
10/16/2008WO2007123819A3 Method for making lens features
10/16/2008WO2007117743A3 Method and system for dry development of a multi-layer mask using sidewall passivation and mask passivation
10/16/2008WO2007115100A3 Method for forming thin film photovoltaic interconnects using self aligned process
10/16/2008WO2007106770A3 Semiconductor nanocryst al high-refractive index materials
10/16/2008WO2007022276A3 Siox:si composite material compositions and methods of making same
10/16/2008WO2005084163A3 Method for creating flip-chip conductive polymer bumps using photolithography and polishing
10/16/2008US20080256504 Mask pattern design method and semiconductor manufacturing method and semiconductor design program
10/16/2008US20080255798 Wafer center finding with a kalman filter
10/16/2008US20080254720 Polishing Head, Polishing Apparatus and Polishing Method for Semiconductor Wafer
10/16/2008US20080254718 Production Method of Polishing Composition
10/16/2008US20080254717 Cmp Polishing Slurry and Method of Polishing Substrate
10/16/2008US20080254715 Device grinding method
10/16/2008US20080254714 Polishing method and polishing apparatus
10/16/2008US20080254651 Spring interconnect structures
10/16/2008US20080254645 Stabily converts nonsingle crystal semiconductor layer to crystallized film; variably realizes optimum dip intensity of target material without preparing and replacing light modulation elements
10/16/2008US20080254644 Method of Substrate Treatment, Computer-Readable Recording Medium, Substrate Treating Apparatus and Substrate Treating System
10/16/2008US20080254643 Structure to improve adhesion between top cvd low-k dielectric and dielectric capping layer
10/16/2008US20080254642 Method of fabricating gate dielectric layer
10/16/2008US20080254641 Manufacturing Method Of Semiconductor Device And Film Deposition System
10/16/2008US20080254640 Method of removing material layer and remnant metal
10/16/2008US20080254639 Method for etching organic hardmasks
10/16/2008US20080254638 Etch process with controlled critical dimension shrink
10/16/2008US20080254637 Methods for removing photoresist defects and a source gas for same
10/16/2008US20080254636 Etching of silicon oxide film
10/16/2008US20080254635 Method for Accelerated Etching of Silicon
10/16/2008US20080254634 Containing two binder resins produced by reacting m-cresol and p-cresol with salicylic aldehyde for first and with formaldehyde for second; heat resistance, pattern adhesion
10/16/2008US20080254633 Multiple exposure lithography method incorporating intermediate layer patterning
10/16/2008US20080254632 Method for forming a semiconductor structure having nanometer line-width
10/16/2008US20080254631 Method for fabrication of semiconductor device
10/16/2008US20080254630 Device and methodology for reducing effective dielectric constant in semiconductor devices
10/16/2008US20080254629 Composition and method used for chemical mechanical planarization of metals
10/16/2008US20080254628 High throughput chemical mechanical polishing composition for metal film planarization
10/16/2008US20080254627 Method for adjusting feature size and position
10/16/2008US20080254626 Processing apparatus
10/16/2008US20080254625 Method for Cleaning a Semiconductor Structure and Chemistry Thereof
10/16/2008US20080254624 Metal cap for interconnect structures
10/16/2008US20080254623 Methods for growing low-resistivity tungsten for high aspect ratio and small features
10/16/2008US20080254622 Cmos silicide metal gate integration
10/16/2008US20080254621 Wafer Electroless Plating System and Associated Methods
10/16/2008US20080254620 Method for fabricating landing plug of semiconductor device
10/16/2008US20080254619 Method of fabricating a semiconductor device
10/16/2008US20080254618 Method of manufacturing a semiconductor device
10/16/2008US20080254617 Void-free contact plug
10/16/2008US20080254616 Semiconductor device and a method of manufacturing the same
10/16/2008US20080254615 Method for reducing dielectric overetch using a dielectric etch stop at a planar surface
10/16/2008US20080254614 Multilayered cap barrier in microelectronic interconnect structures
10/16/2008US20080254613 Methods for forming metal interconnect structure for thin film transistor applications
10/16/2008US20080254612 Polycarbosilane buried etch stops in interconnect structures
10/16/2008US20080254611 Interconnection designs and materials having improved strength and fatigue life
10/16/2008US20080254610 Semiconductor device and process for manufacturing the same
10/16/2008US20080254609 Apparatus and method for electronic fuse with improved esd tolerance
10/16/2008US20080254608 Method of forming contact structure and method of fabricating semiconductor device using the same
10/16/2008US20080254607 integration approach to form the core floating gate for flash memory using an amorphous carbon hard mask and arf lithography
10/16/2008US20080254606 Method of Manufacturing Semiconductor Device
10/16/2008US20080254605 Method of reducing the interfacial oxide thickness
10/16/2008US20080254604 Method for fabricating a hybrid orientation substrate
10/16/2008US20080254603 Method of fabricating semiconductor device
10/16/2008US20080254602 Method of impurity introduction and
10/16/2008US20080254601 Methods for optimizing thin film formation with reactive gases
10/16/2008US20080254600 Methods for forming interconnect structures
10/16/2008US20080254599 Thermal Processing of Silicon Wafers
10/16/2008US20080254598 Laser Irradiation Method, Laser Irradiation Apparatus, And Semiconductor Device
10/16/2008US20080254597 Method for manufacturing SOI substrate
10/16/2008US20080254596 Method for Transferring Wafers
10/16/2008US20080254595 Method for manufacturing SOI substrate
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