Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
06/2014
06/26/2014US20140179093 Gate structure formation processes
06/26/2014US20140179092 Method for forming void-free polysilicon and method for fabricating semiconductor device using the same
06/26/2014US20140179091 Method for forming ultra-shallow doping regions by solid phase diffusion
06/26/2014US20140179090 Storage and sub-atmospheric delivery of dopant compositions for carbon ion implantation
06/26/2014US20140179089 Process for Producing at Least One Silicon-Based Nanoelement in a Silicon Oxide Section and Process for the Manufacture of a Device Employing the Production Process
06/26/2014US20140179088 Method for manufacturing semiconductor substrate
06/26/2014US20140179087 Nanoelectronic structure and method of producing such
06/26/2014US20140179086 Method of manufacturing semiconductor device, method of processing substrate, substrate processing apparatus and computer-readable recording medium
06/26/2014US20140179085 Method of manufacturing semiconductor device, substrate processing apparatus, and non-transitory computer-readable recording medium
06/26/2014US20140179084 Wafer dicing from wafer backside
06/26/2014US20140179083 High die strength semiconductor wafer processing method and system
06/26/2014US20140179082 Selective Etching of Hafnium Oxide Using Non-Aqueous Solutions
06/26/2014US20140179081 Semiconductor device manufacturing method
06/26/2014US20140179078 Method for fabricating semiconductor device
06/26/2014US20140179074 Method of making mosfet integrated with schottky diode with simplified one-time top-contact trench etching
06/26/2014US20140179073 Semiconductor devices and methods of manufacturing the same
06/26/2014US20140179072 Semiconductor device having epitaxial semiconductor layer above impurity layer
06/26/2014US20140179071 Two-step shallow trench isolation (sti) process
06/26/2014US20140179070 Anti-Fuses on Semiconductor Fins
06/26/2014US20140179068 Non-volatile memory having 3d array of read/write elements with low current structures and methods thereof
06/26/2014US20140179067 Fabrication method of semiconductor package
06/26/2014US20140179064 Method for fabricating a package-in-package for high heat dissipation
06/26/2014US20140179063 Resin sealing type semiconductor device and method of manufacturing the same, and lead frame
06/26/2014US20140179062 Isolation Rings for Packages and the Method of Forming the Same
06/26/2014US20140179061 Thin wafer handling
06/26/2014US20140179060 In situ-built pin-grid arrays for coreless substrates, and methods of making same
06/26/2014US20140179059 Package-level integrated circuit connection without top metal pads or bonding wire
06/26/2014US20140179058 Method for manufacturing semiconductor device
06/26/2014US20140179057 Method for manufacturing oxide semiconductor layer and thin film transistor having oxide semiconductor layer
06/26/2014US20140179033 Methods for Forming Templated Materials
06/26/2014US20140179032 Method of manufacturing semiconductor device
06/26/2014US20140179031 Designed asperity contactors, including nanospikes, for semiconductor test using a package, and associated systems and methods
06/26/2014US20140179030 Dissolution Rate Monitor
06/26/2014US20140179029 Method of processing a semiconductor structure
06/26/2014US20140179028 Plasma doping apparatus and plasma doping method
06/26/2014US20140179027 Adjusting intensity of laser beam during laser operation on a semiconductor device
06/26/2014US20140178701 Room temperature debonding composition, method and stack
06/26/2014US20140178680 Film for flip chip type semiconductor back surface and its use
06/26/2014US20140178620 Film for pressure-sensitive adhesive tape and pressure-sensitive adhesive tape
06/26/2014US20140178162 Substrate transfer apparatus, substrate transfer method, and storage medium
06/26/2014US20140178160 Overhead substrate handling and storage system
06/26/2014US20140178157 Load lock chamber
06/26/2014US20140177365 Semiconductor apparatus, test method using the same and muti chips system
06/26/2014US20140177311 Memory device structure with decoders in a device level separate from the array level
06/26/2014US20140177194 Dbf film as a thermal interface material
06/26/2014US20140177149 Reduction of underfill filler settling in integrated circuit packages
06/26/2014US20140177123 Single-body electrostatic chuck
06/26/2014US20140176929 Lithographic Apparatus and Device Manufacturing Method Using Dose Control
06/26/2014US20140176631 Nozzle ejection amount correcting method, functional liquid ejecting method, and organic el device manufacturing method
06/26/2014US20140175677 Dicing tape-integrated film for semiconductor back surface
06/26/2014US20140175669 Method for forming a dual damascene structure of a semiconductor device, and a semiconductor device therewith
06/26/2014US20140175666 Integrated circuit device with stitched interposer
06/26/2014US20140175664 Dielectric solder barrier for semiconductor devices
06/26/2014US20140175663 Semiconductor device having conductive via and manuacturing process
06/26/2014US20140175661 Semiconductor Device and Method of Making Bumpless Flipchip Interconnect Structures
06/26/2014US20140175659 Semiconductor device including air gaps and method of fabricating the same
06/26/2014US20140175658 Anchoring a trace on a substrate to reduce peeling of the trace
06/26/2014US20140175657 Methods to improve laser mark contrast on die backside film in embedded die packages
06/26/2014US20140175654 Surface modified tsv structure and methods thereof
06/26/2014US20140175653 Semiconductor devices comprising interconnect structures and methods of fabrication
06/26/2014US20140175652 Barrier for Through-Silicon Via
06/26/2014US20140175651 Landing structure for through-silicon via
06/26/2014US20140175650 Interconnection wires of semiconductor devices
06/26/2014US20140175649 Electronic device including electrically conductive vias having different cross-sectional areas and related methods
06/26/2014US20140175647 Packaged microelectronic elements having blind vias for heat dissipation
06/26/2014US20140175641 Method for Welding Gold-Silicon Eutectic Chip, and Transistor
06/26/2014US20140175640 Semiconductor Device and Method of Bonding Semiconductor Die to Substrate in Reconstituted Wafer Form
06/26/2014US20140175639 Semiconductor Device and Method of Simultaneous Molding and Thermalcompression Bonding
06/26/2014US20140175637 Back-to-back stacked integrated circuit assembly and method of making
06/26/2014US20140175636 High density interconnect device and method
06/26/2014US20140175634 Methods of promoting adhesion between underfill and conductive bumps and structures formed thereby
06/26/2014US20140175631 Semiconductor module having sliding case and manufacturing method thereof
06/26/2014US20140175624 Method for manufacturing a chip arrangement, and chip arrangement
06/26/2014US20140175623 Semiconductor Device and Method of Forming Discontinuous ESD Protection Layers Between Semiconductor Die
06/26/2014US20140175622 Segmented conductive top layer for radio frequency isolation
06/26/2014US20140175621 Systems and methods for providing intramodule radio frequency isolation
06/26/2014US20140175620 Semiconductor device fabrication method and semiconductor device
06/26/2014US20140175618 Transition metal aluminate and high k dielectric semiconductor stack
06/26/2014US20140175617 Oxygen-containing ceramic hard masks and associated wet-cleans
06/26/2014US20140175615 Semiconductor device and method for manufacturing the same
06/26/2014US20140175614 Wafer stacking structure and method of manufacturing the same
06/26/2014US20140175613 Chip Positioning in Multi-Chip Package
06/26/2014US20140175611 Electrostatic discharge (esd) clamp
06/26/2014US20140175610 Electrostatic discharge devices for integrated circuits
06/26/2014US20140175601 Anti-fuse structure and anti-fuse programming method
06/26/2014US20140175600 Vertically integrated systems
06/26/2014US20140175596 Semiconductor substrate for photonic and electronic structures and method of manufacture
06/26/2014US20140175595 Semiconductor device and method for manufacturing the same
06/26/2014US20140175594 Active pad patterns for gate alignment marks
06/26/2014US20140175579 Method of producing nanopatterned articles, and articles produced thereby
06/26/2014US20140175577 Method and system for providing vertical spin transfer switched magnetic junctions and memories using such junctions
06/26/2014US20140175576 Shape enhanced pin read head magnetic transducer with stripe height defined first and method of making same
06/26/2014US20140175567 Method of Depositing Films with Narrow-Band Conductive Properties
06/26/2014US20140175562 Spacer divot sealing method and semiconductor device incorporating same
06/26/2014US20140175560 Semiconductor structure and method for manufacturing the same
06/26/2014US20140175556 Semiconductor device having v-shaped region
06/26/2014US20140175555 Semiconductor devices having buried metal silicide layers and methods of fabricating the same
06/26/2014US20140175554 Fully substrate-isolated finfet transistor
06/26/2014US20140175551 Apparatus for ESD Protection
06/26/2014US20140175549 Finfet device
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