Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
03/2010
03/25/2010US20100072605 Semiconductor Package With a Controlled Impedance Bus and Method of Forming Same
03/25/2010US20100072603 Semiconductor device assemblies and packages with edge contacts and sacrificial substrates and other intermediate structures used or formed in fabricating the assemblies or packages
03/25/2010US20100072601 Semiconductor device and manufacturing method of a semiconductor device
03/25/2010US20100072600 Fine-pitch oblong solder connections for stacking multi-chip packages
03/25/2010US20100072599 Semiconductor Device and Method of Forming a Wafer Level Package with Top and Bottom Solder Bump Interconnection
03/25/2010US20100072597 Integrated circuit package system for stackable devices
03/25/2010US20100072596 Integrated circuit packaging system having planar interconnect
03/25/2010US20100072595 Method and system for sealing a substrate
03/25/2010US20100072594 Low cost die placement
03/25/2010US20100072591 Integrated circuit package system with anti-peel pad
03/25/2010US20100072590 Stacking Quad Pre-Molded Component Packages, Systems Using the Same, and Methods of Making the Same
03/25/2010US20100072589 Semiconductor package system with die support pad
03/25/2010US20100072588 Substrate structure with die embedded inside and dual build-up layers over both side surfaces and method of the same
03/25/2010US20100072586 Quad flat pack in quad flat pack integrated circuit package system
03/25/2010US20100072585 Top exposed clip with window array
03/25/2010US20100072582 Semiconductor Device and Method of Electrically Connecting a Shielding Layer to Ground Through a Conductive Via Disposed in Peripheral Region Around Semiconductor Die
03/25/2010US20100072581 Composition for film formation, insulating film, semiconductor device, and process for producing the semiconductor device
03/25/2010US20100072579 Through Substrate Conductors
03/25/2010US20100072577 Methods and Devices for Fabricating and Assembling Printable Semiconductor Elements
03/25/2010US20100072576 Methods and structures for altering strain in iii-nitride materials
03/25/2010US20100072575 Layout patterns for deep well region to facilitate routing body-bias voltage
03/25/2010US20100072574 Semiconductor Device and Manufacturing Method Thereof
03/25/2010US20100072573 Method of forming a high capacitance diode and structure therefor
03/25/2010US20100072571 Effective efuse structure
03/25/2010US20100072569 Method of forming an isolation layer, method of manufacturing a semiconductor device using the same, and semiconductor device having an isolation layer
03/25/2010US20100072566 Magnetic Element Utilizing Protective Sidewall Passivation
03/25/2010US20100072562 Functional element package and fabrication method therefor
03/25/2010US20100072561 Method for fabricating micro-electro-mechanical system (mems) device
03/25/2010US20100072560 Nonvolatile Memory Device and Method of Manufacturing the same
03/25/2010US20100072559 Semiconductor device and method of manufacturing the same
03/25/2010US20100072555 Wafer bonding method and wafer stack formed thereby
03/25/2010US20100072553 METAL GATE STRESS FILM FOR MOBILITY ENHANCEMENT IN FinFET DEVICE
03/25/2010US20100072552 Field effect transistor for preventing collapse or deformation of active regions
03/25/2010US20100072549 Semiconductor device and method for manufacturing the same
03/25/2010US20100072548 Semiconductor Device and Method for Manufacturing the Same
03/25/2010US20100072547 Techniques for curvature control in power transistor devices
03/25/2010US20100072544 Method of forming an mos transistor and structure therefor
03/25/2010US20100072543 Trench mosfet with etching buffer layer in trench gate
03/25/2010US20100072542 Semiconductor device, method for manufacturing the same, and data processing system
03/25/2010US20100072538 Nonvolatile semiconductor memory device and method of manufacturing the same
03/25/2010US20100072534 Nonvolatile semiconductor memory device and method of fabricating the same
03/25/2010US20100072527 Semiconductor memory device and manufacturing method thereof
03/25/2010US20100072526 Semiconductor memory device
03/25/2010US20100072525 Semiconductor memory device and method for manufacturing the same
03/25/2010US20100072523 Semiconductor device and method for manufacturing the same
03/25/2010US20100072522 Semiconductor device and fabrication method thereof
03/25/2010US20100072521 Method for forming silicide of semiconductor device
03/25/2010US20100072520 Methods of Fabricating Transistors Having Buried P-Type Layers Coupled to the Gate
03/25/2010US20100072519 P-channel power mis field effect transistor and switching circuit
03/25/2010US20100072518 Semiconductor devices and methods of fabricating same
03/25/2010US20100072516 Nitride semiconductor device
03/25/2010US20100072515 Fabrication and structures of crystalline material
03/25/2010US20100072514 High operating temperature barrier infrared detector with tailorable cutoff wavelength
03/25/2010US20100072513 Semiconductor heterostructures and manufacturing thereof
03/25/2010US20100072493 Active matrix substrate
03/25/2010US20100072490 Low cost flexible display sheet
03/25/2010US20100072487 Light emitting diode, package structure and manufacturing method thereof
03/25/2010US20100072484 Heteroepitaxial gallium nitride-based device formed on an off-cut substrate
03/25/2010US20100072483 Thin film transistor array panel and method for manufacturing the same
03/25/2010US20100072482 Organic light emitting display and method of manufacturing the same
03/25/2010US20100072481 Method and Resulting Structure Using Silver for LCOS Devices
03/25/2010US20100072480 Thin film transistor and method of manufacturing the same
03/25/2010US20100072476 Pixel structure, display panel, photoelectric device and manufacturing method thereof
03/25/2010US20100072472 Nanostructures With 0, 1, 2, and 3 Dimensions, With Negative Differential Resistance and Method for Making These Nanostructures
03/25/2010US20100072461 Thermo-electric semiconductor device and method for manufacturing the same
03/25/2010US20100072460 Nanoelectronic device
03/25/2010US20100072455 Well-Structure Anti-Punch-through Microwire Device
03/25/2010US20100072454 Exposure method, and semiconductor device
03/25/2010US20100072450 Phase change memory device with heater electrodes having fine contact area and method for manufacturing the same
03/25/2010US20100072449 Rram with improved resistance transformation characteristic and method of making the same
03/25/2010US20100072446 Phase-change semiconductor device and methods of manufacturing the same
03/25/2010US20100072445 Memory cell that includes a carbon nano-tube reversible resistance-switching element and methods of forming the same
03/25/2010US20100072418 Polishing slurry
03/25/2010US20100072407 Device and method for managing radiation
03/25/2010US20100072172 Substrate processing apparatus and substrate processing method
03/25/2010US20100072107 Substrate storage container
03/25/2010US20100071940 Connecting terminal, semiconductor package using connecting terminal and method for manufacturing semiconductor package
03/25/2010US20100071850 Mounting table and plasma processing apparatus
03/25/2010US20100071765 Method for fabricating a solar cell using a direct-pattern pin-hole-free masking layer
03/25/2010US20100071754 Structure of solar cell panel and manufacturing method of electrode of solar cell panel
03/25/2010US20100071178 Method for Manufacturing Semiconductor Device
03/25/2010DE19922397B4 Kühl-/Heizvorrichtung für Halbleiterverarbeitungsflüssigkeiten Cooling / heating apparatus for semiconductor processing liquids
03/25/2010DE19646700B4 Vakuumbehandlungskammer, Vakuum-Zerstäubungsverfahren und Magnetronanordnung Vacuum processing chamber, vacuum magnetron sputtering and
03/25/2010DE112008001153T5 Verfahren zum Bilden einer Halbleiterstruktur A method of forming a semiconductor structure
03/25/2010DE102009039571A1 Maske und Verfahren zur Herstellung eines Halbleiterbauelements unter Verwendung derselben Mask and method for manufacturing a semiconductor device using the same
03/25/2010DE102009038844A1 Verfahren zur Abschätzung eines Leckstroms in einem Halbleiterbauelement Method for estimation of a leakage current in a semiconductor device
03/25/2010DE102009038642A1 Laserbearbeitungsvorrichtung Laser processing apparatus
03/25/2010DE102009034577A1 Halbleiteranordnung und Herstellungsverfahren A semiconductor device and manufacturing method
03/25/2010DE102009031378A1 Leistungstransistor Power transistor
03/25/2010DE102009031314A1 Halbleiterbauelement aus Silizium mit bereichsweise vermindertem Bandabstand und Verfahren zur Herstellung desselben Of the same semiconductor device made of silicon with partially reduced bandgap and methods of making
03/25/2010DE102008047517A1 Method for assembly and soldering of solar cells, involves using contact units for connecting solar cells, where solar cells, contact units and soldering agent are assembled on base plate to cell matrix
03/25/2010DE102008047465A1 Semiconductor module, has connection elements passing out from module housing at one of main surfaces at specific distance from one of side surfaces so that elements are partially not surrounded by plastic compound of housing
03/25/2010DE102008044646A1 Verfahren zur Herstellung einer Halbleiterscheibe A process for producing a semiconductor wafer
03/25/2010DE102008035814A1 Verfahren und System zum Reduzieren der Überlagerungsfehler in der Halbleitermassenproduktion unter Anwendung eines Mischanlagenszenarios A method and system for reducing the overlay error in the semiconductor mass production using a mixing scenarios
03/25/2010DE102008035809B3 Technik zum Verringern der Silizidungleichmäßigkeiten in Polysiliziumgateelektroden durch eine dazwischenliegende Diffusionsblockierschicht Technique for reducing the Silizidungleichmäßigkeiten in polysilicon gate electrode by an intermediate diffusion blocking layer
03/25/2010DE102008002753B4 Verfahren zur optischen Inspektion, Detektion und Visualisierung von Defekten auf scheibenförmigen Objekten Method for the optical inspection, detecting and visualization of defects on the disk-shaped objects
03/25/2010DE102007035266B4 Verfahren zum Polieren eines Substrates aus Silicium oder einer Legierung aus Silicium und Germanium A method for polishing a substrate of silicon or an alloy of silicon and germanium
03/24/2010EP2166574A1 Zno-based thin film and zno-based semiconductor element
03/24/2010EP2166571A1 Memory device and its reading method
03/24/2010EP2166567A1 Substrate transfer robot and vacuum processing apparatus provided with the same
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