Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
09/2014
09/18/2014US20140273486 Method of manufacturing a semiconductor device
09/18/2014US20140273485 Electric pressure systems for control of plasma properties and uniformity
09/18/2014US20140273484 Inductively coupled plasma processing apparatus and plasma processing method using the same
09/18/2014US20140273483 Methods for processing a substrate using a selectively grounded and movable process kit ring
09/18/2014US20140273482 Manufacturing method of semiconductor device and dry etching apparatus for the same
09/18/2014US20140273481 Processing systems and methods for halide scavenging
09/18/2014US20140273480 Method for producing a substrate provided with edge protection
09/18/2014US20140273479 Plasma pre-treatment for improved uniformity in semiconductor manufacturing
09/18/2014US20140273478 Reducing Defects in Patterning Processes
09/18/2014US20140273477 Si PRECURSORS FOR DEPOSITION OF SiN AT LOW TEMPERATURES
09/18/2014US20140273476 Methods of reducing defects in directed self-assembled structures
09/18/2014US20140273475 Methods for fabricating guide patterns and methods for fabricating integrated circuits using such guide patterns
09/18/2014US20140273474 Interconnection designs using sidewall image transfer (sit)
09/18/2014US20140273473 Methods of forming a masking layer for patterning underlying structures
09/18/2014US20140273472 Track processing to remove organic films in directed self-assembly chemo-epitaxy applications
09/18/2014US20140273471 Method of forming fine patterns of semiconductor device
09/18/2014US20140273470 Stress-Controlled Formation of Tin Hard Mask
09/18/2014US20140273469 Methods of forming trench/via features in an underlying structure using a process that includes a masking layer formed by a directed self-assembly process
09/18/2014US20140273468 Patterning method for semiconductor device fabrication
09/18/2014US20140273467 Polycrystalline-silicon etch with low-peroxide apm
09/18/2014US20140273466 Local and global reduction of critical dimension (cd) asymmetry in etch processing
09/18/2014US20140273465 Method of forming dual gate oxide
09/18/2014US20140273464 Method of Fabricating a FinFET Device
09/18/2014US20140273463 Methods for fabricating integrated circuits that include a sealed sidewall in a porous low-k dielectric layer
09/18/2014US20140273461 Carbon film hardmask stress reduction by hydrogen ion implantation
09/18/2014US20140273460 Passive control for through silicon via tilt in icp chamber
09/18/2014US20140273459 Systems and Methods for a Narrow Band High Transmittance Interference Filter
09/18/2014US20140273458 Chemical Mechanical Planarization for Tungsten-Containing Substrates
09/18/2014US20140273457 Anti-Reflective Layer and Method
09/18/2014US20140273456 Method for Integrated Circuit Patterning
09/18/2014US20140273455 Hard mask removal during finfet formation
09/18/2014US20140273454 Wet Cleaning Method for Cleaning Small Pitch Features
09/18/2014US20140273453 Semiconductor device and method for manufacturing semiconductor device
09/18/2014US20140273452 Deposition of smooth metal nitride films
09/18/2014US20140273451 Tungsten deposition sequence
09/18/2014US20140273450 Magnetic trap for cylindrical diamagnetic materials
09/18/2014US20140273449 Magnetic trap for cylindrical diamagnetic materials
09/18/2014US20140273448 Composition for forming titanium-containing resist underlayer film and patterning process
09/18/2014US20140273447 Composition for forming titanium-containing resist underlayer film and patterning process
09/18/2014US20140273446 Method of Patterning a Feature of a Semiconductor Device
09/18/2014US20140273445 Method for processing a carrier
09/18/2014US20140273444 Multiple-patterned semiconductor device channels
09/18/2014US20140273443 Methods of forming trench/hole type features in a layer of material of an integrated circuit product
09/18/2014US20140273442 Spacer Etching Process For Integrated Circuit Design
09/18/2014US20140273441 Method for forming patterns of semiconductor device using sadp process
09/18/2014US20140273438 Cu/barrier interface enhancement
09/18/2014US20140273437 Subtractive plasma etching of a blanket layer of metal or metal alloy
09/18/2014US20140273436 Methods of forming barrier layers for conductive copper structures
09/18/2014US20140273435 Method for fabricating a through-silicon via
09/18/2014US20140273434 Method of fabricating copper damascene
09/18/2014US20140273433 Double patterning method
09/18/2014US20140273432 Fabricating method of semiconductor device
09/18/2014US20140273431 Laser resist removal for integrated circuit (ic) packaging
09/18/2014US20140273430 Integrated cluster to enable next generation interconnect
09/18/2014US20140273428 Silane or borane treatment of metal thin films
09/18/2014US20140273427 Electrode for Low-Leakage Devices
09/18/2014US20140273425 Cyclical physical vapor deposition of dielectric layers
09/18/2014US20140273424 Method of Conducting a Direction-Specific Trimming Process for Contact Patterning
09/18/2014US20140273421 High-Throughput System and Method for Post-Implantation Single Wafer Warm-Up
09/18/2014US20140273420 Ion implantation
09/18/2014US20140273419 Multizone control of lamps in a conical lamphead using pyrometers
09/18/2014US20140273418 Back-gated substrate and semiconductor device, and related method of fabrication
09/18/2014US20140273417 Method for forming termination structure for gallium nitride schottky diode
09/18/2014US20140273416 Apparatus and methods for photo-excitation processes
09/18/2014US20140273415 Methods for manufacturing nonplanar graphite-based devices having multiple bandgaps
09/18/2014US20140273414 Method for manufacturing graphene film and graphene channel of transistor
09/18/2014US20140273413 Methods for manufacturing nonplanar graphite-based devices having multiple bandgaps
09/18/2014US20140273412 Methods for Wet Clean of Oxide Layers over Epitaxial Layers
09/18/2014US20140273411 Methods of using inject insert liner assemblies in chemical vapor deposition systems
09/18/2014US20140273410 Inject insert liner assemblies for chemical vapor deposition systems and methods of using same
09/18/2014US20140273409 Gas distribution plate for chemical vapor deposition systems and methods of using same
09/18/2014US20140273406 Processing systems and methods for halide scavenging
09/18/2014US20140273405 Semiconductor-on-insulator wafer manufacturing method for reducing light point defects and surface roughness
09/18/2014US20140273404 Advanced Targeted Microwave Degas System
09/18/2014US20140273403 Light induced nanowire assembly
09/18/2014US20140273402 Method for cutting wafer
09/18/2014US20140273401 Substrate laser dicing mask including laser energy absorbing water-soluble film
09/18/2014US20140273400 Reclaiming processing method for delaminated wafer
09/18/2014US20140273399 Methods of fabricating silicon-on-insulator (soi) semiconductor devices using blanket fusion bonding
09/18/2014US20140273398 Methods for Forming Semiconductor Materials in STI Trenches
09/18/2014US20140273397 Methods of fabricating non-planar transistors including current enhancing structures
09/18/2014US20140273385 Interface for metal gate integration
09/18/2014US20140273383 MOSFETs with Channels on Nothing and Methods for Forming the Same
09/18/2014US20140273382 Methods of fabricating semiconductor devices
09/18/2014US20140273376 Semiconductor arrangement and formation thereof
09/18/2014US20140273375 Methods for fabricating integrated circuits with semiconductor substrate protection
09/18/2014US20140273370 Technique for manufacturing semiconductor devices comprising transistors with different threshold voltages
09/18/2014US20140273369 Methods of forming contacts to source/drain regions of finfet devices
09/18/2014US20140273368 Method of manufacturing semiconductor devices
09/18/2014US20140273367 Integrated circuits and methods for fabricating integrated circuits with gate electrode structure protection
09/18/2014US20140273366 Semiconductor Devices and Methods of Manufacture Thereof
09/18/2014US20140273365 Methods of forming contacts to source/drain regions of finfet devices by forming a region that includes a schottky barrier lowering material
09/18/2014US20140273364 Method of depositing the metal barrier layer comprising silicon dioxide
09/18/2014US20140273363 Method of patterning features of a semiconductor device
09/18/2014US20140273361 Methods for the fabrication of graphene nanoribbon arrays using block copolymer lithography
09/18/2014US20140273356 Semiconductor devices and methods of making the same
09/18/2014US20140273355 Method of making package with interposer frame
09/18/2014US20140273354 Fabrication of 3d chip stacks without carrier plates
09/18/2014US20140273352 Semiconductor device
09/18/2014US20140273347 Methods for Hybrid Wafer Bonding Integrated with CMOS Processing
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