Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
09/2014
09/18/2014US20140264626 Method for forming a gate electrode of a semiconductor device, gate electrode structure for a semiconductor device and according semiconductor device structure
09/18/2014US20140264625 Merged Active Devices on a Common Substrate
09/18/2014US20140264623 Transistor with deep nwell implanted through the gate
09/18/2014US20140264621 Semiconductor structure and manufacturing method for the same
09/18/2014US20140264618 Isolation structure
09/18/2014US20140264617 Hk/mg process flows for p-type semiconductor devices
09/18/2014US20140264616 Epitaxial Growth Between Gates
09/18/2014US20140264614 Spacer Enabled Poly Gate
09/18/2014US20140264612 Growth of epitaxial semiconductor regions with curved top surfaces
09/18/2014US20140264609 Semiconductor device including dummy isolation gate structure and method of fabricating thereof
09/18/2014US20140264601 Strained silicon nfet and silicon germanium pfet on same wafer
09/18/2014US20140264599 Semiconductor device having reduced leakage current at breakdown and method of fabricating thereof
09/18/2014US20140264597 Semiconductor device and a method for fabricating the same
09/18/2014US20140264592 Barrier Layer for FinFET Channels
09/18/2014US20140264573 Method for forming accumulation-mode field effect transistor with improved current capability
09/18/2014US20140264572 Methods of forming semiconductor devices using hard mask layers
09/18/2014US20140264569 Methods and apparatus related to termination regions of a semiconductor device
09/18/2014US20140264568 Semiconductor device and methods of manufacturing the same
09/18/2014US20140264559 Super junction trench metal oxide semiconductor device and method of making the same
09/18/2014US20140264557 Self-aligned approach for drain diffusion in field effect transistors
09/18/2014US20140264553 Method of fabricating monos semiconductor device
09/18/2014US20140264546 Damascene conductor for 3d array
09/18/2014US20140264544 Semiconductor device and methods of manufacturing
09/18/2014US20140264543 Structure and manufacturing method of a non-voltaile memory
09/18/2014US20140264541 Structure and Method for Manufacture of Memory Device With Thin Silicon Body
09/18/2014US20140264538 Semiconductor devices and methods of manufacturing the same
09/18/2014US20140264537 Nonvolatile semiconductor storage device and method of manufacturing the same
09/18/2014US20140264536 Nonvolatile semiconductor storage device and method of manufacturing the same
09/18/2014US20140264535 Method for manufacturing semiconductor memory device and semiconductor memory device
09/18/2014US20140264523 Electronic device including a capacitor structure and a process of forming the same
09/18/2014US20140264506 Methods and apparatus for cmos sensors
09/18/2014US20140264505 Methods for Measuring the Full Well Capacity of CMOS Image Sensors
09/18/2014US20140264498 Memory device and method of manufacturing the same
09/18/2014US20140264497 Self-aligned approach for drain diffusion in field effect transistors
09/18/2014US20140264495 Self-aligned liner method of avoiding pl gate damage
09/18/2014US20140264492 Counter-doped low-power finfet
09/18/2014US20140264490 Replacement gate electrode with a self-aligned dielectric spacer
09/18/2014US20140264486 Methods of forming a semiconductor device with a protected gate cap layer and the resulting device
09/18/2014US20140264484 Fluorine-doped channel silicon-germanium layer
09/18/2014US20140264481 Plug structure and process thereof
09/18/2014US20140264478 Interface for metal gate integration
09/18/2014US20140264473 Sensor with field effect transistor and method of fabricating this transistor
09/18/2014US20140264461 Metal layer enabling directed self-assembly semiconductor layout designs
09/18/2014US20140264460 Three-terminal printed devices interconnected as circuits
09/18/2014US20140264459 High Mobility Transport Layer Structures for Rhombohedral Si/Ge/SiGe Devices
09/18/2014US20140264456 Method of forming a high electron mobility semiconductor device
09/18/2014US20140264452 Method of forming a hemt semiconductor device and structure therefor
09/18/2014US20140264438 Heterostructures for Semiconductor Devices and Methods of Forming the Same
09/18/2014US20140264435 Semiconductor module and method for manufacturing same
09/18/2014US20140264408 Semiconductor structures having active regions comprising ingan, methods of forming such semiconductor structures, and light emitting devices formed from such semiconductor structures
09/18/2014US20140264391 Semiconductor device and manufacturing method thereof
09/18/2014US20140264390 Optoelectronic device and method for manufacturing the same
09/18/2014US20140264387 Fin field effect transistors having a nitride containing spacer to reduce lateral growth of epitaxially deposited semiconductor materials
09/18/2014US20140264385 Manufacture of wafers of wide energy gap semiconductor material for the integration of electronic and/or optical and/or optoelectronic devices
09/18/2014US20140264384 SiC SUBSTRATE WITH SiC EPITAXIAL FILM
09/18/2014US20140264383 Semiconductor device and manufacturing method of the same
09/18/2014US20140264382 Silicon carbide semiconductor devices
09/18/2014US20140264378 Semiconductor structure
09/18/2014US20140264374 Method for manufacturing a silicon carbide substrate for an electrical silicon carbide device, a silicon carbide substrate and an electrical silicon carbide device
09/18/2014US20140264372 Structure and manufacturing method of the structure, and gallium nitride-based semiconductor light-emitting device using the structure and manufacturing method of the device
09/18/2014US20140264371 Semiconductor structures having active regions comprising ingan, methods of forming such semiconductor structures, and light emitting devices formed from such semiconductor structures
09/18/2014US20140264370 Carbon doping semiconductor devices
09/18/2014US20140264368 Semiconductor Wafer and a Process of Forming the Same
09/18/2014US20140264366 Semiconductor apparatus and method of manufacturing the same
09/18/2014US20140264353 3d memory array including crystallized channels
09/18/2014US20140264352 Mask layer and method of formation
09/18/2014US20140264351 Peeling Method and Method of Manufacturing Semiconductor Device
09/18/2014US20140264345 Wafer warpage reduction
09/18/2014US20140264344 Wafers, Panels, Semiconductor Devices, and Glass Treatment Methods
09/18/2014US20140264342 Semiconductor device including a resistor and method for the formation thereof
09/18/2014US20140264340 Reversible hybridization of large surface area array electronics
09/18/2014US20140264338 Line structure for repair and flat panel display device having the same
09/18/2014US20140264337 Packaging mechanisms for dies with different sizes of connectors
09/18/2014US20140264336 Pattern for ultra-high voltage semiconductor device manufacturing and process monitoring
09/18/2014US20140264335 Package substrate and method for testing the same
09/18/2014US20140264334 Layout for reticle and wafer scanning electron microscope registration or overlay measurements
09/18/2014US20140264333 Method and apparatus for monitoring semiconductor fabrication
09/18/2014US20140264332 Semiconductor chip with power gating through silicon vias
09/18/2014US20140264331 Daisy chain connection for testing continuity in a semiconductor die
09/18/2014US20140264325 Double Sided Sl(GE)/Sapphire/lll-Nitride Hybrid Structure
09/18/2014US20140264321 Method of Fabricating IGZO by Sputtering in Oxidizing Gas
09/18/2014US20140264302 Adhesive and method of encapsulating organic electronic device using the same
09/18/2014US20140264286 Suspended superconducting qubits
09/18/2014US20140264282 Heterogeneous layered structure, method of preparing the heterogeneous layered structure, and electronic device including the heterogeneous layered structure
09/18/2014US20140264258 Multi-heterojunction nanoparticles, methods of manufacture thereof and articles comprising the same
09/18/2014US20140264253 Leakage reduction structures for nanowire transistors
09/18/2014US20140264232 Low temperature transition metal oxide for memory device
09/18/2014US20140264155 High-selectivity wet patterning of source-drain electrodes over taos for a bce device structure
09/18/2014US20140264069 Workpiece support structure with four degree of freedom air bearing for high vacuum systems
09/18/2014US20140264059 Light irradiance and thermal measurement in uv and cvd chambers
09/18/2014US20140263582 Low cost interposer and method of fabrication
09/18/2014US20140263275 Rotation enabled multifunctional heater-chiller pedestal
09/18/2014US20140263274 Methods of fault detection for multiplexed heater array
09/18/2014US20140263273 Chamber apparatus and heating method
09/18/2014US20140263271 Modular substrate heater for efficient thermal cycling
09/18/2014US20140262928 Tray for aligning semiconductor packages and test handler using the same, and method of aligning semiconductor packages and test method using the same
09/18/2014US20140262767 Sputter source for semiconductor process chambers
09/18/2014US20140262763 Selectively groundable cover ring for substrate process chambers
09/18/2014US20140262754 Physical vapor deposition methods and systems to form semiconductor films using counterbalance magnetic field generators
09/18/2014US20140262691 Apparatus for Substrate Transportation Using Electrostatic Floating
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