Patents
Patents for G11C 8 - Arrangements for selecting an address in a digital store (19,368)
03/2008
03/06/2008WO2007127784A3 Methods of inter-integrated circuit addressing and devices for performing the same
03/06/2008US20080056057 Synchronous semiconductor memory device
03/06/2008US20080056056 Semiconductor memory device and its driving method
03/06/2008US20080056055 Semiconductor memory device
03/06/2008US20080056054 Methods and apparatus to provide refresh for local out of range read requests to a memory device
03/06/2008US20080056053 Word line control method to improve read margin and write margin for embedded memories
03/06/2008US20080056052 Global Bit Select Circuit Interface with Dual Read and Write Bit Line Pairs
03/06/2008US20080056051 Memory with memory banks and mode registers and method of operating a memory
03/06/2008US20080056050 Semiconductor memory device
03/06/2008US20080056033 Semiconductor memory device
03/06/2008US20080056019 Latency signal generator and method thereof
03/06/2008US20080054964 Semiconductor memory device
03/05/2008EP1894202A2 Word line driver for dram embedded in a logic process
03/05/2008CN101138048A Decoder for memory device
03/05/2008CN100373500C Semiconductor memory device capable of accessing data in continuous burst mode regardless of location of accessed data
03/04/2008US7340632 Domain crossing device
03/04/2008US7340566 System and method for initializing a memory device from block oriented NAND flash
03/04/2008US7340560 Methods and devices for accessing a memory using multiple separate address mapped temporary storage areas
03/04/2008US7340558 Multisection memory bank system
03/04/2008US7339851 Word line driving circuit of semiconductor memory device
03/04/2008US7339850 Semiconductor memory device allowing high-speed data reading
03/04/2008US7339825 Nonvolatile semiconductor memory with write global bit lines and read global bit lines
03/04/2008US7339211 Semiconductor device and method for fabricating the same
02/2008
02/28/2008WO2008024680A2 Circuits to delay a signal from ddr-sdram memory device including an automatic phase error correction
02/28/2008WO2008022454A1 Scalable memory system
02/28/2008WO2008022434A1 Modular command structure for memory and memory system
02/28/2008US20080049542 Address counter for nonvolatile memory device
02/28/2008US20080049541 Semiconductor memory device
02/28/2008US20080049540 Semiconductor memory device comprising data path controller and related method
02/28/2008US20080049539 Semiconductor memory device
02/28/2008US20080049538 Semiconductor memory device and manufacturing method thereof
02/28/2008US20080049536 Semiconductor memory device and semiconductor device comprising the same
02/28/2008US20080049535 Semiconductor Memory Device, Rewrite Processing Method Therefor, and Program Thereof
02/28/2008US20080049532 Semiconductor memory device and refresh control method thereof
02/28/2008CA2659828A1 Scalable memory system
02/27/2008EP1892724A1 A memory device with row selector comprising series connected medium voltage transistors
02/27/2008EP1891642A2 Partial page scheme for memory technologies
02/27/2008CN101131861A Semiconductor storage device
02/27/2008CN101131860A Semiconductor storage device
02/27/2008CN100371985C Multi-function display data processing method and associated control device
02/26/2008US7336559 Delay-locked loop, integrated circuit having the same, and method of driving the same
02/26/2008US7336558 Semiconductor memory device with reduced number of pads
02/26/2008US7336557 Semiconductor memory device suitable for mounting on portable terminal
02/26/2008US7336556 Magnetic non-volatile memory device
02/26/2008US7336550 Semiconductor memory device with reduced multi-row address testing
02/26/2008US7336545 Semiconductor device having switch circuit to supply voltage
02/26/2008US7336537 Handling defective memory blocks of NAND memory devices
02/26/2008US7336536 Handling defective memory blocks of NAND memory devices
02/26/2008US7336523 Memory device using nanotube cells
02/21/2008US20080043566 Latency counter
02/21/2008US20080043565 Memory device and method having multiple address, data and command buses
02/21/2008US20080043564 Semiconductor memory device including distributed data input/output lines
02/21/2008US20080043563 Flexibly controlling the transfer of data between input/output devices and memory
02/21/2008US20080043561 Circuit for an sram with reduced power consumption
02/21/2008US20080043547 Latency control circuit and method using queuing design method
02/21/2008US20080043546 Method of Controlling A Memory Device Having a Memory Core
02/20/2008CN101127238A 半导体存储装置 The semiconductor memory device
02/20/2008CN101127237A Memory device and motion vector detection device
02/20/2008CN101127236A Memory cell circuit
02/19/2008US7333390 Phase controlled high speed interfaces
02/19/2008US7333389 Column decoding architecture for flash memories
02/19/2008US7333388 Multi-port memory cells
02/19/2008US7333366 Common wordline flash array architecture
02/14/2008WO2007120937A3 System and method for low power wordline logic for a memory
02/14/2008US20080037358 Semiconductor memory device comprising a plurality of static memory cells
02/14/2008US20080037357 Double-rate memory
02/14/2008US20080037356 Semiconductor memory device
02/14/2008US20080037355 Semiconductor device whose operation frequency and power supply voltage are dynamically controlled according to load
02/14/2008US20080037354 Word line voltage control circuit for memory devices
02/14/2008US20080037336 Semiconductor memory device
02/13/2008EP1374243B1 System and method for achieving fast switching of analog voltages on a large capacitive load
02/13/2008CN101124552A System and method for storaging data
02/12/2008USRE40053 Delay circuit having delay time adjustable by current
02/12/2008US7330394 Information storage device, information storage method, and information storage program
02/12/2008US7330393 Memory array decoder
02/12/2008US7330392 Dual port semiconductor memory device
02/12/2008US7330387 Integrated semiconductor memory device
02/12/2008US7330381 Method and apparatus for a continuous read command in an extended memory array
02/12/2008US7330368 Three-dimensional semiconductor device provided with interchip interconnection selection means for electrically isolating interconnections other than selected interchip interconnections
02/12/2008CA2437050C Non-destructive readout
02/07/2008WO2008016948A2 Dual data-dependent busses for coupling read/write circuits to a memory array
02/07/2008US20080031079 Interface circuit
02/07/2008US20080031078 High voltage generator and related flash memory device
02/07/2008US20080031077 Daisy chainable memory chip
02/07/2008US20080031076 Daisy Chainable Memory Chip
02/07/2008US20080031075 Memory architecture with advanced main-bitline partitioning circuitry for enhanced erase/program/verify operations
02/07/2008US20080031060 Driver circuits for integrated circuit devices that are operable to reduce gate induced drain leakage (GIDL) current in a transistor and methods of operating the same
02/07/2008US20080031059 Internal voltage generator capable of regulating an internal voltage of a semiconductor memory device
02/07/2008US20080031058 Internal voltage generator capable of regulating an internal voltage of a semiconductor memory device
02/07/2008DE102007034685A1 Speichersystem Storage system
02/06/2008EP1884955A1 Address counter for nonvolatile memory device
02/06/2008CN101120299A Asynchronous jitter reduction technique
02/06/2008CN101119113A Driver circuits for integrated circuit devices that are operable to reduce gate induced drain leakage current in a transistor and methods of operating the same
02/06/2008CN101118787A Displacement register
02/06/2008CN100367403C Non-Destructive readout
02/06/2008CN100367402C Stack pointer generator and method for generating pointers
02/06/2008CN100367342C Method for driving data line, and display device and liquid crystal display device using the same
02/05/2008US7328301 Dynamically mapping block-alterable memories
02/05/2008US7327632 Interface circuit
02/05/2008US7327627 Semiconductor memory
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